📄 i2c.tan.rpt
字号:
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|scl ; i2c_st:U4|i2c_state.ack2 ; clock ; clock ; None ; None ; 2.301 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|scl ; i2c_st:U4|i2c_state.ack3 ; clock ; clock ; None ; None ; 2.299 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|scl ; i2c_st:U4|i2c_state.ack4 ; clock ; clock ; None ; None ; 2.299 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|scl ; i2c_st:U4|i2c_state.w_add ; clock ; clock ; None ; None ; 2.298 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[1] ; i2c_st:U4|i2c_rdata[4] ; clock ; clock ; None ; None ; 2.297 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|cntr_done ; i2c_st:U4|i2c_state.ack2 ; clock ; clock ; None ; None ; 2.284 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|cntr_done ; i2c_st:U4|i2c_state.ack4 ; clock ; clock ; None ; None ; 2.283 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|cntr_done ; i2c_st:U4|i2c_state.w_add ; clock ; clock ; None ; None ; 2.277 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|cntr_done ; i2c_st:U4|i2c_state.ack3 ; clock ; clock ; None ; None ; 2.274 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[1] ; i2c_clk:U3|cntr[5] ; clock ; clock ; None ; None ; 2.271 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[1] ; i2c_clk:U3|cntr[6] ; clock ; clock ; None ; None ; 2.271 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[1] ; i2c_clk:U3|cntr[7] ; clock ; clock ; None ; None ; 2.271 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.data ; i2c_st:U4|i2c_state.ack4 ; clock ; clock ; None ; None ; 2.213 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[1] ; i2c_st:U4|i2c_rdata[1] ; clock ; clock ; None ; None ; 2.212 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[2] ; i2c_clk:U3|cntr[5] ; clock ; clock ; None ; None ; 2.203 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[2] ; i2c_clk:U3|cntr[6] ; clock ; clock ; None ; None ; 2.203 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[2] ; i2c_clk:U3|cntr[7] ; clock ; clock ; None ; None ; 2.203 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[1] ; i2c_st:U4|i2c_rdata[3] ; clock ; clock ; None ; None ; 2.200 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[1] ; i2c_st:U4|i2c_rdata[2] ; clock ; clock ; None ; None ; 2.199 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|cntr_done ; i2c_st:U4|i2c_state.ack1 ; clock ; clock ; None ; None ; 2.196 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[0] ; i2c_clk:U3|cntr[5] ; clock ; clock ; None ; None ; 2.192 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[0] ; i2c_clk:U3|cntr[6] ; clock ; clock ; None ; None ; 2.192 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[0] ; i2c_clk:U3|cntr[7] ; clock ; clock ; None ; None ; 2.192 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|en_cntr ; i2c_st:U4|bit_cntr[2] ; clock ; clock ; None ; None ; 2.179 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[0] ; i2c_st:U4|i2c_rdata[7] ; clock ; clock ; None ; None ; 2.139 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[2] ; i2c_st:U4|i2c_rdata[0] ; clock ; clock ; None ; None ; 2.136 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|scl_tick ; i2c_st:U4|i2c_state.start2 ; clock ; clock ; None ; None ; 2.132 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[1] ; i2c_clk:U3|cntr[4] ; clock ; clock ; None ; None ; 2.056 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[0] ; i2c_st:U4|cntr_done ; clock ; clock ; None ; None ; 2.031 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.w_add ; i2c_st:U4|en_cntr ; clock ; clock ; None ; None ; 2.030 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[0] ; i2c_st:U4|bit_cntr[2] ; clock ; clock ; None ; None ; 2.023 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[2] ; i2c_clk:U3|cntr[4] ; clock ; clock ; None ; None ; 1.986 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[0] ; i2c_clk:U3|cntr[4] ; clock ; clock ; None ; None ; 1.977 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[1] ; i2c_clk:U3|cntr[3] ; clock ; clock ; None ; None ; 1.976 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[3] ; i2c_clk:U3|cntr[5] ; clock ; clock ; None ; None ; 1.970 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[3] ; i2c_clk:U3|cntr[6] ; clock ; clock ; None ; None ; 1.970 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[3] ; i2c_clk:U3|cntr[7] ; clock ; clock ; None ; None ; 1.970 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[2] ; i2c_st:U4|i2c_rdata[7] ; clock ; clock ; None ; None ; 1.961 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[4] ; i2c_clk:U3|cntr[5] ; clock ; clock ; None ; None ; 1.935 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[4] ; i2c_clk:U3|cntr[6] ; clock ; clock ; None ; None ; 1.935 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[4] ; i2c_clk:U3|cntr[7] ; clock ; clock ; None ; None ; 1.935 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_wreg:U1|i2c_go ; i2c_st:U4|i2c_state.en_clk ; clock ; clock ; None ; None ; 1.933 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|cntr_done ; i2c_st:U4|i2c_state.dev_add1 ; clock ; clock ; None ; None ; 1.915 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[2] ; i2c_clk:U3|cntr[3] ; clock ; clock ; None ; None ; 1.906 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[6] ; i2c_clk:U3|cntr[7] ; clock ; clock ; None ; None ; 1.903 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[0] ; i2c_clk:U3|cntr[3] ; clock ; clock ; None ; None ; 1.897 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[1] ; i2c_clk:U3|cntr[2] ; clock ; clock ; None ; None ; 1.896 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.start2 ; i2c_st:U4|scl_en ; clock ; clock ; None ; None ; 1.888 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.dis_clk1 ; i2c_st:U4|scl_en ; clock ; clock ; None ; None ; 1.877 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|en_cntr ; i2c_st:U4|en_cntr ; clock ; clock ; None ; None ; 1.873 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_wreg:U1|i2c_go ; i2c_st:U4|ack_err ; clock ; clock ; None ; None ; 1.842 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_wreg:U1|i2c_go ; i2c_st:U4|i2c_state.idle ; clock ; clock ; None ; None ; 1.841 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_wreg:U1|i2c_go ; i2c_st:U4|i2c_rdy ; clock ; clock ; None ; None ; 1.841 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|scl ; i2c_st:U4|cntr_done ; clock ; clock ; None ; None ; 1.831 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[5] ; i2c_clk:U3|cntr[7] ; clock ; clock ; None ; None ; 1.827 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[0] ; i2c_clk:U3|cntr[2] ; clock ; clock ; None ; None ; 1.817 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.ack3 ; i2c_st:U4|i2c_state.data ; clock ; clock ; None ; None ; 1.789 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.dis_clk1 ; i2c_st:U4|i2c_state.wait1 ; clock ; clock ; None ; None ; 1.788 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[1] ; i2c_st:U4|bit_cntr[2] ; clock ; clock ; None ; None ; 1.785 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|bit_cntr[1] ; i2c_st:U4|cntr_done ; clock ; clock ; None ; None ; 1.783 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.start1 ; i2c_st:U4|scl_en ; clock ; clock ; None ; None ; 1.781 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.start1 ; i2c_st:U4|i2c_state.dev_add1 ; clock ; clock ; None ; None ; 1.773 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_st:U4|i2c_state.dev_add1 ; i2c_st:U4|en_cntr ; clock ; clock ; None ; None ; 1.755 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[3] ; i2c_clk:U3|cntr[4] ; clock ; clock ; None ; None ; 1.749 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; i2c_clk:U3|cntr[5] ; i2c_clk:U3|cntr[6] ; clock ; clock ; None ; None ; 1.747 ns ;
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