pullup.vhd
来自「用FPGA来实现摄像头的捕捉和采集」· VHDL 代码 · 共 31 行
VHD
31 行
--**********************************************************************************
-- Ryan Henderson
-- Oregon Institute of Technology
-- CMOS digital camera controller and frame capture device
-- May, 21 2002
--
-- pullup.vhd
--
-- Used in testbench to pull up I2C lines
--**********************************************************************************
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
entity PULLUP is
port(v101: OUT std_logic);
end PULLUP;
architecture archPULLUP of PULLUP is
begin
v101 <= 'H';
end archPULLUP;
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