asyn_fifo_distrib.edn

用FPGA来实现摄像头的捕捉和采集

(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
(status (written (timeStamp 2002 2 24 22 28 3)
   (author "Xilinx, Inc.")
   (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 4.1i"))))
   (comment "This file is owned and controlled by Xilinx and must be used
solely for design, simulation, implementation and creation of design files
limited to Xilinx devices or technologies. Use with non-Xilinx devices or
technologies is expressly prohibited and immediately terminates your license.
Xilinx products are not intended for use in life support appliances, devices,
or systems. Use in such applications are expressly prohibited.
Copyright (C) 2001, Xilinx, Inc.  All Rights Reserved.")
   (comment "Core parameters: ")
       (comment "c_use_blockmem = 1 ")
       (comment "c_rd_count_width = 2 ")
       (comment "c_has_wr_ack = 0 ")
       (comment "c_has_almost_full = 1 ")
       (comment "c_has_wr_err = 0 ")
       (comment "c_wr_err_low = 0 ")
       (comment "c_wr_ack_low = 0 ")
       (comment "c_data_width = 16 ")
       (comment "c_enable_rlocs = 0 ")
       (comment "c_rd_err_low = 0 ")
       (comment "c_rd_ack_low = 0 ")
       (comment "c_wr_count_width = 4 ")
       (comment "InstanceName = asyn_fifo_distrib ")
       (comment "c_has_rd_count = 0 ")
       (comment "c_has_almost_empty = 1 ")
       (comment "c_has_rd_ack = 0 ")
       (comment "c_has_wr_count = 1 ")
       (comment "c_fifo_depth = 15 ")
       (comment "c_has_rd_err = 0 ")
   (external xilinxun (edifLevel 0)
      (technology (numberDefinition))
       (cell VCC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port P (direction OUTPUT))
               )
           )
       )
       (cell GND (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port G (direction OUTPUT))
               )
           )
       )
       (cell FDCE (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port CE (direction INPUT))
                   (port CLR (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell FDPE (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port CE (direction INPUT))
                   (port PRE (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell LUT4 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port I0 (direction INPUT))
                   (port I1 (direction INPUT))
                   (port I2 (direction INPUT))
                   (port I3 (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell MUXCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell MUXCY_D (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port O (direction OUTPUT))
                   (port LO (direction OUTPUT))
               )
           )
       )
       (cell MUXCY_L (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port LO (direction OUTPUT))
               )
           )
       )
       (cell RAMB4_S16_S16 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port WEA (direction INPUT))
                   (port ENA (direction INPUT))
                   (port RSTA (direction INPUT))
                   (port CLKA (direction INPUT))
                   (port (rename DIA_0_ "DIA<0>") (direction INPUT))
                   (port (rename DIA_1_ "DIA<1>") (direction INPUT))
                   (port (rename DIA_2_ "DIA<2>") (direction INPUT))
                   (port (rename DIA_3_ "DIA<3>") (direction INPUT))
                   (port (rename DIA_4_ "DIA<4>") (direction INPUT))
                   (port (rename DIA_5_ "DIA<5>") (direction INPUT))
                   (port (rename DIA_6_ "DIA<6>") (direction INPUT))
                   (port (rename DIA_7_ "DIA<7>") (direction INPUT))
                   (port (rename DIA_8_ "DIA<8>") (direction INPUT))
                   (port (rename DIA_9_ "DIA<9>") (direction INPUT))
                   (port (rename DIA_10_ "DIA<10>") (direction INPUT))
                   (port (rename DIA_11_ "DIA<11>") (direction INPUT))
                   (port (rename DIA_12_ "DIA<12>") (direction INPUT))
                   (port (rename DIA_13_ "DIA<13>") (direction INPUT))
                   (port (rename DIA_14_ "DIA<14>") (direction INPUT))
                   (port (rename DIA_15_ "DIA<15>") (direction INPUT))
                   (port (rename DOA_0_ "DOA<0>") (direction OUTPUT))
                   (port (rename DOA_1_ "DOA<1>") (direction OUTPUT))
                   (port (rename DOA_2_ "DOA<2>") (direction OUTPUT))
                   (port (rename DOA_3_ "DOA<3>") (direction OUTPUT))
                   (port (rename DOA_4_ "DOA<4>") (direction OUTPUT))
                   (port (rename DOA_5_ "DOA<5>") (direction OUTPUT))
                   (port (rename DOA_6_ "DOA<6>") (direction OUTPUT))
                   (port (rename DOA_7_ "DOA<7>") (direction OUTPUT))
                   (port (rename DOA_8_ "DOA<8>") (direction OUTPUT))
                   (port (rename DOA_9_ "DOA<9>") (direction OUTPUT))
                   (port (rename DOA_10_ "DOA<10>") (direction OUTPUT))
                   (port (rename DOA_11_ "DOA<11>") (direction OUTPUT))
                   (port (rename DOA_12_ "DOA<12>") (direction OUTPUT))
                   (port (rename DOA_13_ "DOA<13>") (direction OUTPUT))
                   (port (rename DOA_14_ "DOA<14>") (direction OUTPUT))
                   (port (rename DOA_15_ "DOA<15>") (direction OUTPUT))
                   (port (rename ADDRA_0_ "ADDRA<0>") (direction INPUT))
                   (port (rename ADDRA_1_ "ADDRA<1>") (direction INPUT))
                   (port (rename ADDRA_2_ "ADDRA<2>") (direction INPUT))
                   (port (rename ADDRA_3_ "ADDRA<3>") (direction INPUT))
                   (port (rename ADDRA_4_ "ADDRA<4>") (direction INPUT))
                   (port (rename ADDRA_5_ "ADDRA<5>") (direction INPUT))
                   (port (rename ADDRA_6_ "ADDRA<6>") (direction INPUT))
                   (port (rename ADDRA_7_ "ADDRA<7>") (direction INPUT))
                   (port WEB (direction INPUT))
                   (port ENB (direction INPUT))
                   (port RSTB (direction INPUT))
                   (port CLKB (direction INPUT))
                   (port (rename DIB_0_ "DIB<0>") (direction INPUT))
                   (port (rename DIB_1_ "DIB<1>") (direction INPUT))
                   (port (rename DIB_2_ "DIB<2>") (direction INPUT))
                   (port (rename DIB_3_ "DIB<3>") (direction INPUT))
                   (port (rename DIB_4_ "DIB<4>") (direction INPUT))
                   (port (rename DIB_5_ "DIB<5>") (direction INPUT))
                   (port (rename DIB_6_ "DIB<6>") (direction INPUT))
                   (port (rename DIB_7_ "DIB<7>") (direction INPUT))
                   (port (rename DIB_8_ "DIB<8>") (direction INPUT))
                   (port (rename DIB_9_ "DIB<9>") (direction INPUT))
                   (port (rename DIB_10_ "DIB<10>") (direction INPUT))
                   (port (rename DIB_11_ "DIB<11>") (direction INPUT))
                   (port (rename DIB_12_ "DIB<12>") (direction INPUT))
                   (port (rename DIB_13_ "DIB<13>") (direction INPUT))
                   (port (rename DIB_14_ "DIB<14>") (direction INPUT))
                   (port (rename DIB_15_ "DIB<15>") (direction INPUT))
                   (port (rename DOB_0_ "DOB<0>") (direction OUTPUT))
                   (port (rename DOB_1_ "DOB<1>") (direction OUTPUT))
                   (port (rename DOB_2_ "DOB<2>") (direction OUTPUT))
                   (port (rename DOB_3_ "DOB<3>") (direction OUTPUT))
                   (port (rename DOB_4_ "DOB<4>") (direction OUTPUT))
                   (port (rename DOB_5_ "DOB<5>") (direction OUTPUT))
                   (port (rename DOB_6_ "DOB<6>") (direction OUTPUT))
                   (port (rename DOB_7_ "DOB<7>") (direction OUTPUT))
                   (port (rename DOB_8_ "DOB<8>") (direction OUTPUT))
                   (port (rename DOB_9_ "DOB<9>") (direction OUTPUT))
                   (port (rename DOB_10_ "DOB<10>") (direction OUTPUT))
                   (port (rename DOB_11_ "DOB<11>") (direction OUTPUT))
                   (port (rename DOB_12_ "DOB<12>") (direction OUTPUT))
                   (port (rename DOB_13_ "DOB<13>") (direction OUTPUT))
                   (port (rename DOB_14_ "DOB<14>") (direction OUTPUT))
                   (port (rename DOB_15_ "DOB<15>") (direction OUTPUT))
                   (port (rename ADDRB_0_ "ADDRB<0>") (direction INPUT))
                   (port (rename ADDRB_1_ "ADDRB<1>") (direction INPUT))
                   (port (rename ADDRB_2_ "ADDRB<2>") (direction INPUT))
                   (port (rename ADDRB_3_ "ADDRB<3>") (direction INPUT))
                   (port (rename ADDRB_4_ "ADDRB<4>") (direction INPUT))
                   (port (rename ADDRB_5_ "ADDRB<5>") (direction INPUT))
                   (port (rename ADDRB_6_ "ADDRB<6>") (direction INPUT))
                   (port (rename ADDRB_7_ "ADDRB<7>") (direction INPUT))
               )
           )
       )
       (cell XORCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port LI (direction INPUT))
                   (port CI (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell asyn_fifo_distrib
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( rename din_15_ "din(15)") (direction INPUT))
   (port ( rename din_14_ "din(14)") (direction INPUT))
   (port ( rename din_13_ "din(13)") (direction INPUT))
   (port ( rename din_12_ "din(12)") (direction INPUT))
   (port ( rename din_11_ "din(11)") (direction INPUT))
   (port ( rename din_10_ "din(10)") (direction INPUT))
   (port ( rename din_9_ "din(9)") (direction INPUT))
   (port ( rename din_8_ "din(8)") (direction INPUT))
   (port ( rename din_7_ "din(7)") (direction INPUT))
   (port ( rename din_6_ "din(6)") (direction INPUT))
   (port ( rename din_5_ "din(5)") (direction INPUT))
   (port ( rename din_4_ "din(4)") (direction INPUT))
   (port ( rename din_3_ "din(3)") (direction INPUT))
   (port ( rename din_2_ "din(2)") (direction INPUT))
   (port ( rename din_1_ "din(1)") (direction INPUT))
   (port ( rename din_0_ "din(0)") (direction INPUT))
   (port ( rename wr_en "wr_en") (direction INPUT))
   (port ( rename wr_clk "wr_clk") (direction INPUT))
   (port ( rename rd_en "rd_en") (direction INPUT))
   (port ( rename rd_clk "rd_clk") (direction INPUT))
   (port ( rename ainit "ainit") (direction INPUT))
   (port ( rename dout_15_ "dout(15)") (direction OUTPUT))
   (port ( rename dout_14_ "dout(14)") (direction OUTPUT))
   (port ( rename dout_13_ "dout(13)") (direction OUTPUT))
   (port ( rename dout_12_ "dout(12)") (direction OUTPUT))
   (port ( rename dout_11_ "dout(11)") (direction OUTPUT))
   (port ( rename dout_10_ "dout(10)") (direction OUTPUT))
   (port ( rename dout_9_ "dout(9)") (direction OUTPUT))
   (port ( rename dout_8_ "dout(8)") (direction OUTPUT))
   (port ( rename dout_7_ "dout(7)") (direction OUTPUT))
   (port ( rename dout_6_ "dout(6)") (direction OUTPUT))
   (port ( rename dout_5_ "dout(5)") (direction OUTPUT))
   (port ( rename dout_4_ "dout(4)") (direction OUTPUT))
   (port ( rename dout_3_ "dout(3)") (direction OUTPUT))
   (port ( rename dout_2_ "dout(2)") (direction OUTPUT))
   (port ( rename dout_1_ "dout(1)") (direction OUTPUT))
   (port ( rename dout_0_ "dout(0)") (direction OUTPUT))
   (port ( rename full "full") (direction OUTPUT))
   (port ( rename empty "empty") (direction OUTPUT))
   (port ( rename almost_full "almost_full") (direction OUTPUT))
   (port ( rename almost_empty "almost_empty") (direction OUTPUT))
   (port ( rename wr_count_3_ "wr_count(3)") (direction OUTPUT))
   (port ( rename wr_count_2_ "wr_count(2)") (direction OUTPUT))
   (port ( rename wr_count_1_ "wr_count(1)") (direction OUTPUT))
   (port ( rename wr_count_0_ "wr_count(0)") (direction OUTPUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance B7
      (viewRef view_1 (cellRef RAMB4_S16_S16 (libraryRef xilinxun)))
      (property INIT_00 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_01 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_02 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_03 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_04 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_05 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_06 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_07 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_08 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_09 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0A (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0B (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0C (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0D (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0E (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0F (string "0000000000000000000000000000000000000000000000000000000000000000"))
   )
   (instance BU0
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "2222"))
   )
   (instance BU1
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "2222"))
   )
   (instance BU2
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "5555"))
   )
   (instance BU3
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
   )
   (instance BU4
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
   )
   (instance BU5
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU6
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "aaaa"))
   )
   (instance BU7
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
   )
   (instance BU8
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
   )
   (instance BU9
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU10
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "aaaa"))
   )
   (instance BU11
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
   )
   (instance BU12
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
   )
   (instance BU13
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU14
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "aaaa"))
   )
   (instance BU15
      (viewRef view_1 (cellRef XORCY (libraryRef xilinxun)))
   )
   (instance BU16
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU17
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "6666"))
   )
   (instance BU18
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU19
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "6666"))
   )
   (instance BU20
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU21
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "6666"))
   )
   (instance BU22
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU23
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "6666"))
   )
   (instance BU24
      (viewRef view_1 (cellRef FDPE (libraryRef xilinxun)))
   )
   (instance BU25
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "fffe"))
   )
   (instance BU26
      (viewRef view_1 (cellRef MUXCY_L (libraryRef xilinxun)))
   )
   (instance BU27
      (viewRef view_1 (cellRef FDPE (libraryRef xilinxun)))
   )
   (instance BU28
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "ffff"))
   )
   (instance BU29
      (viewRef view_1 (cellRef MUXCY_L (libraryRef xilinxun)))
   )
   (instance BU30
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU31
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "99a5"))
   )
   (instance BU32
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
   )
   (instance BU33
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU34
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "99a5"))
   )
   (instance BU35
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
   )
   (instance BU36
      (viewRef view_1 (cellRef FDCE (libraryRef xilinxun)))
   )
   (instance BU37
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "99a5"))
   )
   (instance BU38
      (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun)))
   )
   (instance BU39
      (viewRef view_1 (cellRef FDPE (libraryRef xilinxun)))
   )
   (instance BU40
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "99a5"))
   )
   (instance BU41
      (viewRef view_1 (cellRef MUXCY_D (libraryRef xilinxun)))
   )
   (instance BU42
      (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun)))
      (property INIT (string "ffff"))
   )