voltage.tan.qmsg

来自「交流电压表相应的VHDL代码」· QMSG 代码 · 共 21 行 · 第 1/3 页

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 27 22:06:02 2006 " "Info: Processing started: Fri Oct 27 22:06:02 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off voltage -c voltage " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off voltage -c voltage" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Warning" "WTAN_FOUND_COMB_LATCHES" "" "Warning: Timing Analysis found one or more latches implemented as combinational loops" { { "Warning" "WTAN_COMB_LATCH_NODE" "LED_data\[0\]\$latch " "Warning: Node \"LED_data\[0\]\$latch\" is a latch" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0} { "Warning" "WTAN_COMB_LATCH_NODE" "LED_data\[1\]\$latch " "Warning: Node \"LED_data\[1\]\$latch\" is a latch" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0} { "Warning" "WTAN_COMB_LATCH_NODE" "LED_data\[2\]\$latch " "Warning: Node \"LED_data\[2\]\$latch\" is a latch" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0} { "Warning" "WTAN_COMB_LATCH_NODE" "LED_data\[3\]\$latch " "Warning: Node \"LED_data\[3\]\$latch\" is a latch" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0} { "Warning" "WTAN_COMB_LATCH_NODE" "LED_data\[4\]\$latch " "Warning: Node \"LED_data\[4\]\$latch\" is a latch" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0} { "Warning" "WTAN_COMB_LATCH_NODE" "LED_data\[5\]\$latch " "Warning: Node \"LED_data\[5\]\$latch\" is a latch" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0} { "Warning" "WTAN_COMB_LATCH_NODE" "LED_data\[6\]\$latch " "Warning: Node \"LED_data\[6\]\$latch\" is a latch" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "LED_data\[6\]\$latch " "Info: Node \"LED_data\[6\]\$latch\"" {  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0}  } { { "voltage.vhd" "" { Text "E:/yang/yl_vhdl/v1/voltage.vhd" 98 -1 0 } }  } 0}