voltage.map.eqn

交流电压表相应的VHDL代码

--H3_cout[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

H3_cout[3] = CARRY(\clk_8khz:n[3] & (H3_cout[2]));


--H3_cs_buffer[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

H3_cs_buffer[2] = \clk_8khz:n[2] $ (H3_cout[1]);

--H3L73 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~428
--operation mode is arithmetic

H3L73 = \clk_8khz:n[2] $ (H3_cout[1]);

--H3_cout[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

H3_cout[2] = CARRY(\clk_8khz:n[2] & (H3_cout[1]));


--H3_cs_buffer[7] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]
--operation mode is arithmetic

H3_cs_buffer[7] = \clk_8khz:n[7] $ (H3_cout[6]);

--H3L74 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~429
--operation mode is arithmetic

H3L74 = \clk_8khz:n[7] $ (H3_cout[6]);

--H3_cout[7] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[7]
--operation mode is arithmetic

H3_cout[7] = CARRY(\clk_8khz:n[7] & (H3_cout[6]));


--H3_cs_buffer[6] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

H3_cs_buffer[6] = \clk_8khz:n[6] $ (H3_cout[5]);

--H3L54 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~430
--operation mode is arithmetic

H3L54 = \clk_8khz:n[6] $ (H3_cout[5]);

--H3_cout[6] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

H3_cout[6] = CARRY(\clk_8khz:n[6] & (H3_cout[5]));


--H3_cs_buffer[5] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

H3_cs_buffer[5] = \clk_8khz:n[5] $ (H3_cout[4]);

--H3L34 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]~431
--operation mode is arithmetic

H3L34 = \clk_8khz:n[5] $ (H3_cout[4]);

--H3_cout[5] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

H3_cout[5] = CARRY(\clk_8khz:n[5] & (H3_cout[4]));


--H3_cs_buffer[4] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

H3_cs_buffer[4] = \clk_8khz:n[4] $ (H3_cout[3]);

--H3L14 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~432
--operation mode is arithmetic

H3L14 = \clk_8khz:n[4] $ (H3_cout[3]);

--H3_cout[4] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

H3_cout[4] = CARRY(\clk_8khz:n[4] & (H3_cout[3]));


--x[0] is x[0]
--operation mode is normal

x[0]_lut_out = AD_data[0];
x[0] = DFFEA(x[0]_lut_out, !clk_8k, , , A1L012, , );

--A1L112Q is x[0]~16
--operation mode is normal

A1L112Q = x[0];


--x[1] is x[1]
--operation mode is normal

x[1]_lut_out = AD_data[1];
x[1] = DFFEA(x[1]_lut_out, !clk_8k, , , A1L012, , );

--A1L412Q is x[1]~17
--operation mode is normal

A1L412Q = x[1];


--x[2] is x[2]
--operation mode is normal

x[2]_lut_out = AD_data[2];
x[2] = DFFEA(x[2]_lut_out, !clk_8k, , , A1L012, , );

--A1L612Q is x[2]~18
--operation mode is normal

A1L612Q = x[2];


--x[3] is x[3]
--operation mode is normal

x[3]_lut_out = AD_data[3];
x[3] = DFFEA(x[3]_lut_out, !clk_8k, , , A1L012, , );

--A1L812Q is x[3]~19
--operation mode is normal

A1L812Q = x[3];


--x[4] is x[4]
--operation mode is normal

x[4]_lut_out = AD_data[4];
x[4] = DFFEA(x[4]_lut_out, !clk_8k, , , A1L012, , );

--A1L022Q is x[4]~20
--operation mode is normal

A1L022Q = x[4];


--x[5] is x[5]
--operation mode is normal

x[5]_lut_out = AD_data[5];
x[5] = DFFEA(x[5]_lut_out, !clk_8k, , , A1L012, , );

--A1L222Q is x[5]~21
--operation mode is normal

A1L222Q = x[5];


--x[6] is x[6]
--operation mode is normal

x[6]_lut_out = AD_data[6];
x[6] = DFFEA(x[6]_lut_out, !clk_8k, , , A1L012, , );

--A1L422Q is x[6]~22
--operation mode is normal

A1L422Q = x[6];


--x[7] is x[7]
--operation mode is normal

x[7]_lut_out = AD_data[7];
x[7] = DFFEA(x[7]_lut_out, !clk_8k, , , A1L012, , );

--A1L622Q is x[7]~23
--operation mode is normal

A1L622Q = x[7];


--F1_unreg_res_node[31] is lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[31]
--operation mode is normal

F1_unreg_res_node[31] = H3_cout[30] $ \clk_8khz:n[31];

--F1L3 is lpm_add_sub:add_rtl_0|addcore:adder|unreg_res_node[31]~63
--operation mode is normal

F1L3 = H3_cout[30] $ \clk_8khz:n[31];


--A1L421 is LessThan~555
--operation mode is normal

A1L421 = x[3] & (x[2] & !addr[2] # !addr[3]) # !x[3] & x[2] & !addr[2] & !addr[3];

--A1L331 is LessThan~576
--operation mode is normal

A1L331 = x[3] & (x[2] & !addr[2] # !addr[3]) # !x[3] & x[2] & !addr[2] & !addr[3];


--A1L521 is LessThan~556
--operation mode is normal

A1L521 = A1L231 & (addr[4] $ !x[4]) # !A1L231 & A1L421 & (addr[4] $ !x[4]);

--A1L431 is LessThan~577
--operation mode is normal

A1L431 = A1L231 & (addr[4] $ !x[4]) # !A1L231 & A1L421 & (addr[4] $ !x[4]);


--A1L621 is LessThan~557
--operation mode is normal

A1L621 = addr[7] & x[7] & (addr[6] $ !x[6]) # !addr[7] & !x[7] & (addr[6] $ !x[6]);

--A1L531 is LessThan~578
--operation mode is normal

A1L531 = addr[7] & x[7] & (addr[6] $ !x[6]) # !addr[7] & !x[7] & (addr[6] $ !x[6]);


--A1L031 is LessThan~570
--operation mode is normal

A1L031 = (addr[5] $ x[5] # !A1L621 # !A1L521) & CASCADE(A1L141);

--A1L631 is LessThan~579
--operation mode is normal

A1L631 = (addr[5] $ x[5] # !A1L621 # !A1L521) & CASCADE(A1L141);


--A1L721 is LessThan~565
--operation mode is normal

A1L721 = addr[7] & (addr[6] # !x[7] # !x[6]) # !addr[7] & !x[7] & (addr[6] # !x[6]);

--A1L731 is LessThan~580
--operation mode is normal

A1L731 = addr[7] & (addr[6] # !x[7] # !x[6]) # !addr[7] & !x[7] & (addr[6] # !x[6]);

--A1L831 is LessThan~581
--operation mode is normal

A1L831 = addr[7] & (addr[6] # !x[7] # !x[6]) # !addr[7] & !x[7] & (addr[6] # !x[6]);


--A1L821 is LessThan~566
--operation mode is normal

A1L821 = x[4] & (!addr[4]);

--A1L931 is LessThan~582
--operation mode is normal

A1L931 = x[4] & (!addr[4]);


--A1L131 is LessThan~571
--operation mode is normal

A1L131 = (addr[5] & (!x[5] # !A1L821) # !addr[5] & !A1L821 & !x[5] # !A1L621) & CASCADE(A1L831);

--A1L041 is LessThan~583
--operation mode is normal

A1L041 = (addr[5] & (!x[5] # !A1L821) # !addr[5] & !A1L821 & !x[5] # !A1L621) & CASCADE(A1L831);

--A1L141 is LessThan~584
--operation mode is normal

A1L141 = (addr[5] & (!x[5] # !A1L821) # !addr[5] & !A1L821 & !x[5] # !A1L621) & CASCADE(A1L831);


--A1L921 is LessThan~568
--operation mode is normal

A1L921 = addr[3] & x[3] & (addr[2] $ !x[2]) # !addr[3] & !x[3] & (addr[2] $ !x[2]);

--A1L241 is LessThan~585
--operation mode is normal

A1L241 = addr[3] & x[3] & (addr[2] $ !x[2]) # !addr[3] & !x[3] & (addr[2] $ !x[2]);

--A1L341 is LessThan~586
--operation mode is normal

A1L341 = addr[3] & x[3] & (addr[2] $ !x[2]) # !addr[3] & !x[3] & (addr[2] $ !x[2]);


--A1L231 is LessThan~572
--operation mode is normal

A1L231 = (x[1] & (x[0] & !addr[0] # !addr[1]) # !x[1] & x[0] & !addr[0] & !addr[1]) & CASCADE(A1L341);

--A1L441 is LessThan~587
--operation mode is normal

A1L441 = (x[1] & (x[0] & !addr[0] # !addr[1]) # !x[1] & x[0] & !addr[0] & !addr[1]) & CASCADE(A1L341);


--A1L59 is clk_8k~1
--operation mode is normal

A1L59 = !A1L271;

--A1L79 is clk_8k~3
--operation mode is normal

A1L79 = !A1L271;


--A1L67 is addr[0]~8
--operation mode is normal

A1L67 = !A1L031;

--A1L87 is addr[0]~24
--operation mode is normal

A1L87 = !A1L031;


--A1L012 is x[0]~8
--operation mode is normal

A1L012 = !intr;

--A1L212 is x[0]~24
--operation mode is normal

A1L212 = !intr;


--clk is clk
--operation mode is input

clk = INPUT();


--AD_data[0] is AD_data[0]
--operation mode is input

AD_data[0] = INPUT();


--intr is intr
--operation mode is input

intr = INPUT();


--AD_data[1] is AD_data[1]
--operation mode is input

AD_data[1] = INPUT();


--AD_data[2] is AD_data[2]
--operation mode is input

AD_data[2] = INPUT();


--AD_data[3] is AD_data[3]
--operation mode is input

AD_data[3] = INPUT();


--AD_data[4] is AD_data[4]
--operation mode is input

AD_data[4] = INPUT();


--AD_data[5] is AD_data[5]
--operation mode is input

AD_data[5] = INPUT();


--AD_data[6] is AD_data[6]
--operation mode is input

AD_data[6] = INPUT();


--AD_data[7] is AD_data[7]
--operation mode is input

AD_data[7] = INPUT();


--rd_wr is rd_wr
--operation mode is output

rd_wr = OUTPUT(clk_8k);


--LED_point is LED_point
--operation mode is output

LED_point = OUTPUT(A1L321Q);


--LED_data[0] is LED_data[0]
--operation mode is output

LED_data[0] = OUTPUT(LED_data[0]$latch);


--LED_data[1] is LED_data[1]
--operation mode is output

LED_data[1] = OUTPUT(LED_data[1]$latch);


--LED_data[2] is LED_data[2]
--operation mode is output

LED_data[2] = OUTPUT(LED_data[2]$latch);


--LED_data[3] is LED_data[3]
--operation mode is output

LED_data[3] = OUTPUT(LED_data[3]$latch);


--LED_data[4] is LED_data[4]
--operation mode is output

LED_data[4] = OUTPUT(LED_data[4]$latch);


--LED_data[5] is LED_data[5]
--operation mode is output

LED_data[5] = OUTPUT(LED_data[5]$latch);


--LED_data[6] is LED_data[6]
--operation mode is output

LED_data[6] = OUTPUT(LED_data[6]$latch);


--sw[0] is sw[0]
--operation mode is output

sw[0] = OUTPUT(!A1L541);


--sw[1] is sw[1]
--operation mode is output

sw[1] = OUTPUT(!K1L1);


--sw[2] is sw[2]
--operation mode is output

sw[2] = OUTPUT(!K1L2);


--sw[3] is sw[3]
--operation mode is output

sw[3] = OUTPUT(!K1L3);