voltage.map.eqn

交流电压表相应的VHDL代码

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--clk_8k is clk_8k
--operation mode is normal

clk_8k_lut_out = !clk_8k;
clk_8k = DFFEA(clk_8k_lut_out, clk, , , A1L59, , );

--A1L69Q is clk_8k~2
--operation mode is normal

A1L69Q = clk_8k;


--A1L321Q is LED_point~reg0
--operation mode is normal

A1L321Q_lut_out = L1_q[1] & (!L1_q[0]);
A1L321Q = DFFEA(A1L321Q_lut_out, clk_8k, , , , , );

--A1L221Q is LED_point~0
--operation mode is normal

A1L221Q = A1L321Q;


--L1_q[1] is lpm_counter:sw_point|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is up_dn_cntr

L1_q[1]_lut_out = L1_q[1] $ L1L3;
L1_q[1] = DFFEA(L1_q[1]_lut_out, clk_8k, , , , , );

--L1L9Q is lpm_counter:sw_point|alt_counter_f10ke:wysi_counter|q[1]~0
--operation mode is up_dn_cntr

L1L9Q = L1_q[1];


--L1_q[0] is lpm_counter:sw_point|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is up_dn_cntr

L1_q[0]_lut_out = !L1_q[0];
L1_q[0] = DFFEA(L1_q[0]_lut_out, clk_8k, , , , , );

--L1L7Q is lpm_counter:sw_point|alt_counter_f10ke:wysi_counter|q[0]~1
--operation mode is up_dn_cntr

L1L7Q = L1_q[0];

--L1L3 is lpm_counter:sw_point|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is up_dn_cntr

L1L3 = CARRY(L1_q[0]);


--A1L541 is Mux~439
--operation mode is normal

A1L541 = !L1_q[1] & !L1_q[0];

--A1L851 is Mux~456
--operation mode is normal

A1L851 = !L1_q[1] & !L1_q[0];


--K1L1 is lpm_decode:scan_sw|decode_f9c:auto_generated|cmpr1_aeb_int~46
--operation mode is normal

K1L1 = L1_q[0] & (!L1_q[1]);

--K1L4 is lpm_decode:scan_sw|decode_f9c:auto_generated|cmpr1_aeb_int~50
--operation mode is normal

K1L4 = L1_q[0] & (!L1_q[1]);


--K1L2 is lpm_decode:scan_sw|decode_f9c:auto_generated|cmpr1_aeb_int~47
--operation mode is normal

K1L2 = L1_q[1] & (!L1_q[0]);

--K1L5 is lpm_decode:scan_sw|decode_f9c:auto_generated|cmpr1_aeb_int~51
--operation mode is normal

K1L5 = L1_q[1] & (!L1_q[0]);


--K1L3 is lpm_decode:scan_sw|decode_f9c:auto_generated|cmpr1_aeb_int~48
--operation mode is normal

K1L3 = L1_q[1] & L1_q[0];

--K1L6 is lpm_decode:scan_sw|decode_f9c:auto_generated|cmpr1_aeb_int~52
--operation mode is normal

K1L6 = L1_q[1] & L1_q[0];


--A1L271 is reduce_nor~0
--operation mode is normal

A1L271 = !A1L081 # !A1L971 # !A1L871 # !A1L771;

--A1L181 is reduce_nor~349
--operation mode is normal

A1L181 = !A1L081 # !A1L971 # !A1L871 # !A1L771;


--result[0] is result[0]
--operation mode is normal

result[0]_lut_out = A1L451 # J1_q[0] & L1_q[1] & !L1_q[0];
result[0] = DFFEA(result[0]_lut_out, clk_8k, , , , , );

--A1L691Q is result[0]~7
--operation mode is normal

A1L691Q = result[0];


--result[1] is result[1]
--operation mode is normal

result[1]_lut_out = A1L551 # L1_q[0] & J2_q[5];
result[1] = DFFEA(result[1]_lut_out, clk_8k, , , , , );

--A1L891Q is result[1]~8
--operation mode is normal

A1L891Q = result[1];


--result[2] is result[2]
--operation mode is normal

result[2]_lut_out = A1L651 # L1_q[0] & J2_q[6];
result[2] = DFFEA(result[2]_lut_out, clk_8k, , , , , );

--A1L002Q is result[2]~9
--operation mode is normal

A1L002Q = result[2];


--result[3] is result[3]
--operation mode is normal

result[3]_lut_out = A1L751 # L1_q[0] & J2_q[7];
result[3] = DFFEA(result[3]_lut_out, clk_8k, , , , , );

--A1L202Q is result[3]~10
--operation mode is normal

A1L202Q = result[3];


--A1L641 is Mux~440
--operation mode is normal

A1L641 = result[1] & (result[3]) # !result[1] & (result[2] $ (result[0] & !result[3]));

--A1L951 is Mux~457
--operation mode is normal

A1L951 = result[1] & (result[3]) # !result[1] & (result[2] $ (result[0] & !result[3]));


--A1L741 is Mux~441
--operation mode is normal

A1L741 = result[1] $ !result[2] # !result[3];

--A1L061 is Mux~458
--operation mode is normal

A1L061 = result[1] $ !result[2] # !result[3];


--LED_data[0]$latch is LED_data[0]$latch
--operation mode is normal

LED_data[0]$latch = A1L741 & !A1L641 # !A1L741 & (LED_data[0]$latch);

--A1L201 is LED_data[0]$latch~3
--operation mode is normal

A1L201 = A1L741 & !A1L641 # !A1L741 & (LED_data[0]$latch);


--A1L841 is Mux~442
--operation mode is normal

A1L841 = result[2] & (result[3] # result[0] $ result[1]);

--A1L161 is Mux~459
--operation mode is normal

A1L161 = result[2] & (result[3] # result[0] $ result[1]);


--LED_data[1]$latch is LED_data[1]$latch
--operation mode is normal

LED_data[1]$latch = A1L741 & !A1L841 # !A1L741 & (LED_data[1]$latch);

--A1L501 is LED_data[1]$latch~3
--operation mode is normal

A1L501 = A1L741 & !A1L841 # !A1L741 & (LED_data[1]$latch);


--A1L941 is Mux~443
--operation mode is normal

A1L941 = result[1] & (result[3] # !result[0] & !result[2]);

--A1L261 is Mux~460
--operation mode is normal

A1L261 = result[1] & (result[3] # !result[0] & !result[2]);


--LED_data[2]$latch is LED_data[2]$latch
--operation mode is normal

LED_data[2]$latch = A1L741 & !A1L941 # !A1L741 & (LED_data[2]$latch);

--A1L801 is LED_data[2]$latch~3
--operation mode is normal

A1L801 = A1L741 & !A1L941 # !A1L741 & (LED_data[2]$latch);


--A1L051 is Mux~444
--operation mode is normal

A1L051 = result[0] & (result[3] # result[1] $ !result[2]) # !result[0] & (result[1] & (result[3]) # !result[1] & result[2]);

--A1L361 is Mux~461
--operation mode is normal

A1L361 = result[0] & (result[3] # result[1] $ !result[2]) # !result[0] & (result[1] & (result[3]) # !result[1] & result[2]);


--LED_data[3]$latch is LED_data[3]$latch
--operation mode is normal

LED_data[3]$latch = A1L741 & !A1L051 # !A1L741 & (LED_data[3]$latch);

--A1L111 is LED_data[3]$latch~3
--operation mode is normal

A1L111 = A1L741 & !A1L051 # !A1L741 & (LED_data[3]$latch);


--A1L151 is Mux~445
--operation mode is normal

A1L151 = result[0] # result[1] & (result[3]) # !result[1] & result[2];

--A1L461 is Mux~462
--operation mode is normal

A1L461 = result[0] # result[1] & (result[3]) # !result[1] & result[2];


--LED_data[4]$latch is LED_data[4]$latch
--operation mode is normal

LED_data[4]$latch = A1L741 & !A1L151 # !A1L741 & (LED_data[4]$latch);

--A1L411 is LED_data[4]$latch~3
--operation mode is normal

A1L411 = A1L741 & !A1L151 # !A1L741 & (LED_data[4]$latch);


--A1L251 is Mux~446
--operation mode is normal

A1L251 = result[0] & (result[1] # result[2] $ !result[3]) # !result[0] & (result[2] & (result[3]) # !result[2] & result[1]);

--A1L561 is Mux~463
--operation mode is normal

A1L561 = result[0] & (result[1] # result[2] $ !result[3]) # !result[0] & (result[2] & (result[3]) # !result[2] & result[1]);


--LED_data[5]$latch is LED_data[5]$latch
--operation mode is normal

LED_data[5]$latch = A1L741 & !A1L251 # !A1L741 & (LED_data[5]$latch);

--A1L711 is LED_data[5]$latch~3
--operation mode is normal

A1L711 = A1L741 & !A1L251 # !A1L741 & (LED_data[5]$latch);


--A1L351 is Mux~447
--operation mode is normal

A1L351 = result[1] & (result[2] & result[0] & result[3] # !result[2] & (!result[3])) # !result[1] & (result[2] $ result[3]);

--A1L661 is Mux~464
--operation mode is normal

A1L661 = result[1] & (result[2] & result[0] & result[3] # !result[2] & (!result[3])) # !result[1] & (result[2] $ result[3]);


--LED_data[6]$latch is LED_data[6]$latch
--operation mode is normal

LED_data[6]$latch = A1L741 & A1L351 # !A1L741 & (LED_data[6]$latch);

--A1L021 is LED_data[6]$latch~3
--operation mode is normal

A1L021 = A1L741 & A1L351 # !A1L741 & (LED_data[6]$latch);


--J2_q[4] is lpm_rom:data_L|altrom:srom|q[4]
J2_q[4]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[4]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[4] = MEMORY_SEGMENT(, , , , , , , , J2_q[4]_write_address, J2_q[4]_read_address);


--J2_q[0] is lpm_rom:data_L|altrom:srom|q[0]
J2_q[0]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[0]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[0] = MEMORY_SEGMENT(, , , , , , , , J2_q[0]_write_address, J2_q[0]_read_address);


--A1L451 is Mux~448
--operation mode is normal

A1L451 = !L1_q[1] & (L1_q[0] & J2_q[4] # !L1_q[0] & (J2_q[0]));

--A1L761 is Mux~465
--operation mode is normal

A1L761 = !L1_q[1] & (L1_q[0] & J2_q[4] # !L1_q[0] & (J2_q[0]));


--J1_q[0] is lpm_rom:data_H|altrom:srom|q[0]
J1_q[0]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[0]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[0] = MEMORY_SEGMENT(, , , , , , , , J1_q[0]_write_address, J1_q[0]_read_address);


--J1_q[1] is lpm_rom:data_H|altrom:srom|q[1]
J1_q[1]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[1]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[1] = MEMORY_SEGMENT(, , , , , , , , J1_q[1]_write_address, J1_q[1]_read_address);


--J2_q[1] is lpm_rom:data_L|altrom:srom|q[1]
J2_q[1]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[1]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[1] = MEMORY_SEGMENT(, , , , , , , , J2_q[1]_write_address, J2_q[1]_read_address);


--A1L551 is Mux~450
--operation mode is normal

A1L551 = L1_q[1] & (J1_q[1] # L1_q[0]) # !L1_q[1] & (J2_q[1] & !L1_q[0]);

--A1L861 is Mux~466
--operation mode is normal

A1L861 = L1_q[1] & (J1_q[1] # L1_q[0]) # !L1_q[1] & (J2_q[1] & !L1_q[0]);


--J2_q[5] is lpm_rom:data_L|altrom:srom|q[5]
J2_q[5]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[5]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[5] = MEMORY_SEGMENT(, , , , , , , , J2_q[5]_write_address, J2_q[5]_read_address);


--J1_q[2] is lpm_rom:data_H|altrom:srom|q[2]
J1_q[2]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[2]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[2] = MEMORY_SEGMENT(, , , , , , , , J1_q[2]_write_address, J1_q[2]_read_address);


--J2_q[2] is lpm_rom:data_L|altrom:srom|q[2]
J2_q[2]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[2]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[2] = MEMORY_SEGMENT(, , , , , , , , J2_q[2]_write_address, J2_q[2]_read_address);


--A1L651 is Mux~452
--operation mode is normal

A1L651 = L1_q[1] & (J1_q[2] # L1_q[0]) # !L1_q[1] & (J2_q[2] & !L1_q[0]);

--A1L961 is Mux~467
--operation mode is normal

A1L961 = L1_q[1] & (J1_q[2] # L1_q[0]) # !L1_q[1] & (J2_q[2] & !L1_q[0]);


--J2_q[6] is lpm_rom:data_L|altrom:srom|q[6]
J2_q[6]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[6]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[6] = MEMORY_SEGMENT(, , , , , , , , J2_q[6]_write_address, J2_q[6]_read_address);


--J1_q[3] is lpm_rom:data_H|altrom:srom|q[3]
J1_q[3]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[3]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J1_q[3] = MEMORY_SEGMENT(, , , , , , , , J1_q[3]_write_address, J1_q[3]_read_address);


--J2_q[3] is lpm_rom:data_L|altrom:srom|q[3]
J2_q[3]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[3]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[3] = MEMORY_SEGMENT(, , , , , , , , J2_q[3]_write_address, J2_q[3]_read_address);


--A1L751 is Mux~454
--operation mode is normal

A1L751 = L1_q[1] & (J1_q[3] # L1_q[0]) # !L1_q[1] & (J2_q[3] & !L1_q[0]);

--A1L071 is Mux~468
--operation mode is normal

A1L071 = L1_q[1] & (J1_q[3] # L1_q[0]) # !L1_q[1] & (J2_q[3] & !L1_q[0]);


--J2_q[7] is lpm_rom:data_L|altrom:srom|q[7]
J2_q[7]_write_address = WR_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[7]_read_address = RD_ADDR(addr[0], addr[1], addr[2], addr[3], addr[4], addr[5], addr[6], addr[7]);
J2_q[7] = MEMORY_SEGMENT(, , , , , , , , J2_q[7]_write_address, J2_q[7]_read_address);


--\clk_8khz:n[27] is \clk_8khz:n[27]
--operation mode is normal

\clk_8khz:n[27]_lut_out = H3_cs_buffer[27];
\clk_8khz:n[27] = DFFEA(\clk_8khz:n[27]_lut_out, clk, , , , , );

--A1L65Q is \clk_8khz:n[27]~9
--operation mode is normal

A1L65Q = \clk_8khz:n[27];


--\clk_8khz:n[26] is \clk_8khz:n[26]
--operation mode is normal

\clk_8khz:n[26]_lut_out = H3_cs_buffer[26];
\clk_8khz:n[26] = DFFEA(\clk_8khz:n[26]_lut_out, clk, , , , , );

--A1L45Q is \clk_8khz:n[26]~9
--operation mode is normal

A1L45Q = \clk_8khz:n[26];


--\clk_8khz:n[25] is \clk_8khz:n[25]
--operation mode is normal

\clk_8khz:n[25]_lut_out = H3_cs_buffer[25];
\clk_8khz:n[25] = DFFEA(\clk_8khz:n[25]_lut_out, clk, , , , , );