cyclic.drc.rpt

基于fpga的屏幕测试程序

; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|add~234               ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|add~241               ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|add~241COUT1_377      ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|add~239               ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~205          ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~205COUT1_381 ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~210          ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~210COUT1_379 ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~220          ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~220COUT1_377 ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~225          ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~225COUT1_375 ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~230          ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~230COUT1_373 ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~235          ;
; Design should not contain combinational loops - Combinational loop1 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|LessThan~235COUT1_371 ;
; Design should not contain combinational loops - Combinational loop2 ; fran_pg:pattern_generator|pattern_dl:thepattern_dl|start                 ;
+---------------------------------------------------------------------+--------------------------------------------------------------------------+


+------------------------------------------------------------------------------+
; High Violations                                                              ;
+----------------------------------------+-------------------------------------+
; Rule name                              ; Name                                ;
+----------------------------------------+-------------------------------------+
; Clock signal should be a global signal ; fran_pg:pattern_generator|vsync_art ;
; Clock signal should be a global signal ; expander:i2c_expander|klok_div_8[1] ;
; Clock signal should be a global signal ; expander:i2c_expander|klok_div_8[0] ;
+----------------------------------------+-------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Medium Violations                                                                                                                                   ;
+----------------------------------------------------------------+------------------------------------------------------------------------------------+
; Rule name                                                      ; Name                                                                               ;
+----------------------------------------------------------------+------------------------------------------------------------------------------------+
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|klok_div_8[0]                                                ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cregout:expander_data|reg[4]                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|shiftInReg[4]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|wr                                 ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|klok_div_8[2]                                                ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cregout:expander_data|reg[3]                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cregout:expander_data|reg[1]                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cregout:expander_data|reg[6]                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cregout:expander_data|reg[5]                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|shiftInReg[3]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|addressed~247                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|klok_div_8[1]                                                ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cregout:expander_data|reg[2]                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|shiftInReg[2]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|waitff~_Duplicate_1                ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|rd                                 ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|scln                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|bitCounter[3]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|bitCounter[1]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|bitCounter[2]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|addressed~244                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|shiftInReg[5]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|shiftInReg[1]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|sclp                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|medianFilter:sclMedian|sum[2]      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|bitCounter[0]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|byteCounter[0]~292                 ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|byteCounter[1]~291                 ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|shiftInReg[0]                      ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|sdan                               ;
; Design should not contain ripple clock structures - Structure1 ; expander:i2c_expander|i2cSlave:I2Cslavecore_one|addressed~246                      ;