vmovingbars.tdf

基于fpga的屏幕测试程序

-- vmovingbars.tdf
-- Based on Zhang Yuning's original work
-- Reworked by Chai Lin
-- 2006-08-27

include "fran_pg.inc";
include "lpm_rom.inc";
include "lpm_compare";
include "lpm_counter.inc";
include "lpm_add_sub.inc";

SUBDESIGN vmovingbars
(	VAC[10..0]			: INPUT ;
	clk			    	: INPUT ;
	vout_pulse          : INPUT ;
	act_vcounter[10..0] : INPUT ;
	
	blocksize[6..0]		: INPUT ;
	v_sta[11..0]	    : INPUT ;
	v_end[11..0]	    : INPUT ;
   	velocity[5..0]      : INPUT ;  --First bit denotes direction; 
	
    venable            : OUTPUT;
)

VARIABLE
	add_moving: lpm_add_sub WITH (
				                    LPM_WIDTH = 11,
				                    LPM_DIRECTION = "ADD",
				                    ONE_INPUT_IS_CONSTANT = "NO",
				                    LPM_PIPELINE = 0
				                  );
	
	sub_moving: lpm_add_sub WITH (
				                    LPM_WIDTH = 11,
				                    LPM_DIRECTION = "SUB",
				                    ONE_INPUT_IS_CONSTANT = "NO",
				                    LPM_PIPELINE = 0
				                    );
	sub_moving_initial_12b
	          : lpm_add_sub WITH (
				                    LPM_WIDTH = 12,
				                    LPM_DIRECTION = "SUB",
				                    ONE_INPUT_IS_CONSTANT = "YES",
				                    LPM_PIPELINE = 0
				                    );
	add_compare,
	sub_compare,
    load1,
	load2
     		   : lpm_compare WITH (
				                    LPM_WIDTH = 11,
									ONE_INPUT_IS_CONSTANT = "NO",
									LPM_REPRESENTATION = "UNSIGNED",
									LPM_PIPELINE = 2
									);    
	sta_add,
	end_add
	           : lpm_add_sub WITH (
				                    LPM_WIDTH = 12,
				                    LPM_DIRECTION = "ADD",
				                    ONE_INPUT_IS_CONSTANT = "NO",
				                    LPM_PIPELINE = 0
				                    );
	sta_add_sub_12b,
	end_add_sub_12b
	           : lpm_add_sub WITH (
				                    LPM_WIDTH = 12,
				                    LPM_DIRECTION = "SUB",
				                    ONE_INPUT_IS_CONSTANT = "YES",
				                    LPM_PIPELINE = 0
				                    );
	sta_add_compare_12b,
	end_add_compare_12b
                : lpm_compare WITH (
				                    LPM_WIDTH = 12,
									ONE_INPUT_IS_CONSTANT = "YES",
									LPM_REPRESENTATION = "UNSIGNED",
									LPM_PIPELINE = 0
									);		         
    sta_end_compare
                : lpm_compare WITH (
				                    LPM_WIDTH = 11,
									ONE_INPUT_IS_CONSTANT = "NO",
									LPM_REPRESENTATION = "UNSIGNED",
									LPM_PIPELINE = 1
									);									   
   
	add_moving_buffer[10..0]    : DFFE;
	sub_moving_buffer[10..0]    : DFFE;
	v_ena_dff					: DFF;
	moving_buffer[10..0]        : NODE;
	sta_moving_buffer[10..0]    : NODE;
    end_moving_buffer[10..0]    : NODE;
    v_enable                    : NODE;
	v_ena                    	: NODE;

 
BEGIN
	------------------------------------------------------------------------------
	--EFFECT OF MOVING
	------------------------------------------------------------------------------
	add_moving.dataa[] = add_moving_buffer[].q;	
    add_moving.datab[] = (0,0,0,0,0,0,velocity[4..0]);
    CASE add_compare.ageb IS
    WHEN 0 =>
         add_moving_buffer[].d = add_moving.result[]; 
    WHEN 1 =>
         add_moving_buffer[].d = add_moving.result[]-VAC[] ;
    END CASE;       
    add_moving_buffer[].clk=clk;
    add_moving_buffer[].ena=vout_pulse;
   
    add_compare.dataa[] = add_moving.result[] ;
    add_compare.datab[] = VAC[] ;
    add_compare.clock   = clk ;
    -------------------------------------------------------
    sub_moving.dataa[] = sub_moving_buffer[].q;	
    sub_moving.datab[] = (0,0,0,0,0,0,velocity[4..0]);
    CASE sub_compare.ageb IS
    WHEN 0 =>
         sub_moving_buffer[].d = sub_moving.result[]; 
    WHEN 1 =>
         sub_moving_buffer[].d = sub_moving_initial_12b.result[10..0] ;
    END CASE;       
    sub_moving_buffer[].clk=clk;
    sub_moving_buffer[].ena=vout_pulse;

    sub_compare.dataa[]  = sub_moving.result[] ;
    sub_compare.datab[]  = VAC[] ;
    sub_compare.clock    = clk ;

	sub_moving_initial_12b.dataa[] = (0,VAC[]) + (0,sub_moving.result[]);
	sub_moving_initial_12b.datab[] = 2048;
	
	----------------------------------------------------------
    CASE velocity[5] IS
    WHEN 0 =>
         moving_buffer[] = add_moving.result[];
    WHEN 1 =>
         moving_buffer[] = sub_moving_buffer[].q;      
    END CASE;
	
	
	------------------------------------------------------------------------------
	---
	------------------------------------------------------------------------------
	sta_add.dataa[] = v_sta[11..0];
	sta_add.datab[] = (0,moving_buffer[]);
	end_add.dataa[] = v_end[11..0];
	end_add.datab[] = (0,moving_buffer[]);
	
	sta_add_sub_12b.dataa[] = sta_add.result[];
	sta_add_sub_12b.datab[] = (0,VAC[]) ;
	end_add_sub_12b.dataa[] = end_add.result[];
	end_add_sub_12b.datab[] = (0,VAC[]) ;
	------------------------------------------------------------------------------
	--
	------------------------------------------------------------------------------
    sta_add_compare_12b.dataa[] = sta_add.result[];
    sta_add_compare_12b.datab[] = (0,VAC[]);
    CASE sta_add_compare_12b.ageb IS
    WHEN 1 =>
         sta_moving_buffer[]= sta_add_sub_12b.result[10..0];
    WHEN 0 =>
         sta_moving_buffer[]= sta_add.result[10..0];
    END CASE;

    end_add_compare_12b.dataa[] = end_add.result[];
    end_add_compare_12b.datab[] = (0,VAC[]);
    CASE end_add_compare_12b.ageb IS
    WHEN 1 =>
         end_moving_buffer[]= end_add_sub_12b.result[10..0];
    WHEN 0 =>
         end_moving_buffer[]= end_add.result[10..0];
    END CASE;

    ---------------------------------------------------------------------------
    --
    ---------------------------------------------------------------------------
    sta_end_compare.dataa[] = sta_moving_buffer[];
    sta_end_compare.datab[] = end_moving_buffer[];
    sta_end_compare.clock   = clk;

    load1.dataa[] = act_vcounter[];
    load1.datab[] = sta_moving_buffer[];
    load1.clock   = clk ;
    load2.dataa[] = act_vcounter[];
    load2.datab[] = end_moving_buffer[];
    load2.clock   = clk ;

    CASE sta_end_compare.alb IS
    WHEN 1 => 
       v_enable = load1.ageb AND load2.alb;
    WHEN 0 =>
       v_enable = load1.ageb OR  load2.alb;
    END CASE;
	
    CASE blocksize[6..0] IS 
    WHEN 0  => 
       v_ena=GND;
    WHEN 101=>
       v_ena=GND;
    WHEN OTHERS =>
       v_ena=v_enable;
    END CASE; 
 	
	v_ena_dff.clk	=	clk;
	v_ena_dff.d		=	v_ena;	
 	venable=v_ena_dff.q;
END;