varintensitys.tdf

来自「基于fpga的屏幕测试程序」· TDF 代码 · 共 62 行

-- varloadblockcounters.tdf
-- Age van Dalfsen, 2003-12-02
-- subdesign to generate the h and v counter values 
-- for the variable load block pattern


SUBDESIGN varintensitys
(
	clk			    	: INPUT;
	intensity[3..0]	    : INPUT;
	act_vcounter[10..0]	: INPUT;
	act_hcounter[10..0] : INPUT;
	henable            : OUTPUT;
	venable            : OUTPUT;
)


	
BEGIN

	CASE intensity[3..0] IS
    WHEN 0 =>  henable = VCC; 
               venable = VCC;
    WHEN 1 =>  henable = VCC; 
               venable = (act_vcounter[1..0]!=0);
    WHEN 2 =>  henable = VCC; 
               venable = (act_vcounter[0]==0);
    WHEN 3 =>  henable = VCC; 
               venable = (act_vcounter[1..0]==0);

    WHEN 4 =>  henable = (act_hcounter[1..0]!=0); 
               venable = VCC;
    WHEN 5 =>  henable = (act_hcounter[1..0]!=0); 
               venable = (act_vcounter[1..0]!=0);
    WHEN 6 =>  henable = (act_hcounter[1..0]!=0); 
               venable = (act_vcounter[0]==0);
    WHEN 7 =>  henable = (act_hcounter[1..0]!=0); 
               venable = (act_vcounter[1..0]==0);

    WHEN 8 =>  henable = (act_hcounter[0]==0); 
               venable = VCC;
    WHEN 9 =>  henable = (act_hcounter[0]==0); 
               venable = (act_vcounter[1..0]!=0);
    WHEN 10 => henable = (act_hcounter[0]==0); 
               venable = (act_vcounter[0]==0);
    WHEN 11 => henable = (act_hcounter[0]==0); 
               venable = (act_vcounter[1..0]==0);

    WHEN 12 => henable = (act_hcounter[1..0]==0); 
               venable = VCC;
    WHEN 13 => henable = (act_hcounter[1..0]==0); 
               venable = (act_vcounter[1..0]!=0);
    WHEN 14 => henable = (act_hcounter[1..0]==0); 
               venable = (act_vcounter[0]==0);
    WHEN 15 => henable = (act_hcounter[1..0]==0); 
               venable = (act_vcounter[1..0]==0);

    END CASE;


END;