frantic_42wvga_sdi_1_org.tdf

基于fpga的屏幕测试程序

Green_art[] = adressingG.q AND allow_adres_pattern.q;
Blue_art[] 	= adressingB.q AND allow_adres_pattern.q;
adres_mode_active.d = VCC;
WHEN OTHERS =>
adres_mode_active.d = GND;
Red_art[] 	= GND;
Green_art[] = GND;
Blue_art[] 	= GND;
END CASE;

--AvD, the list below is for 852H*480V display
CASE (fullregbuf[12..8].q) IS
WHEN 0 => 	
loadhstart[10..0]		= 396;
loadhend[10..0]		= 456;
loadvstart[10..0]		= 223;
loadvend[10..0]		= 257;
WHEN 1 => 	
loadhstart[10..0]		= 384;
loadhend[10..0]		= 469;
loadvstart[10..0]		= 216;
loadvend[10..0]		= 264;
WHEN 2 => 	
loadhstart[10..0]		= 366;
loadhend[10..0]		= 486;
loadvstart[10..0]		= 206;
loadvend[10..0]		= 274;
WHEN 3 => 	
loadhstart[10..0]		= 352;
loadhend[10..0]		= 500;
loadvstart[10..0]		= 199;
loadvend[10..0]		= 282;
WHEN 4 => 	
loadhstart[10..0]		= 341;
loadhend[10..0]		= 511;
loadvstart[10..0]		= 192;
loadvend[10..0]		= 288;
WHEN 5 => 	
loadhstart[10..0]		= 331;
loadhend[10..0]		= 522;
loadvstart[10..0]		= 187;
loadvend[10..0]		= 294;
WHEN 6 => 	
loadhstart[10..0]		= 322;
loadhend[10..0]		= 531;
loadvstart[10..0]		= 181;
loadvend[10..0]		= 299;
WHEN 7 => 	
loadhstart[10..0]		= 314;
loadhend[10..0]		= 539;
loadvstart[10..0]		= 177;
loadvend[10..0]		= 304;
WHEN 8 => 	
loadhstart[10..0]		= 306;
loadhend[10..0]		= 547;
loadvstart[10..0]		= 172;
loadvend[10..0]		= 308;
WHEN 9 => 	
loadhstart[10..0]		= 298;
loadhend[10..0]		= 554;
loadvstart[10..0]		= 168;
loadvend[10..0]		= 312;
WHEN 10 => 	
loadhstart[10..0] 	= 292;
loadhend[10..0]		= 561;
loadvstart[10..0]		= 164;
loadvend[10..0]		= 316;
WHEN 11 => 	
loadhstart[10..0]		= 279;
loadhend[10..0]		= 574;
loadvstart[10..0]		= 157;
loadvend[10..0]		= 323;
WHEN 12 => 	
loadhstart[10..0]		= 267;
loadhend[10..0]		= 586;
loadvstart[10..0]		= 150;
loadvend[10..0]		= 330;
WHEN 13 => 	
loadhstart[10..0]		= 256;
loadhend[10..0]		= 597;
loadvstart[10..0]		= 144;
loadvend[10..0]		= 336;
WHEN 14 => 	
loadhstart[10..0]		= 246;
loadhend[10..0]		= 607;
loadvstart[10..0]		= 138;
loadvend[10..0]		= 342;
WHEN 15 => 	
loadhstart[10..0]		= 236;
loadhend[10..0]		= 617;
loadvstart[10..0]		= 133;
loadvend[10..0]		= 348;
WHEN 16 => 	
loadhstart[10..0]		= 213;
loadhend[10..0]		= 639;
loadvstart[10..0]		= 120;
loadvend[10..0]		= 360;
WHEN 17 => 	
loadhstart[10..0]		= 193;
loadhend[10..0]		= 660;
loadvstart[10..0]		= 109;
loadvend[10..0]		= 372;
WHEN 18 => 	
loadhstart[10..0]		= 174;
loadhend[10..0]		= 678;
loadvstart[10..0]		= 98;
loadvend[10..0]		= 382;
WHEN 19 => 	
loadhstart[10..0]		= 157;
loadhend[10..0]		= 696;
loadvstart[10..0]		= 88;
loadvend[10..0]		= 392;
WHEN 20 => 	
loadhstart[10..0]		= 140;
loadhend[10..0]		= 712;
loadvstart[10..0]		= 79;
loadvend[10..0]		= 401;
WHEN 21 => 	
loadhstart[10..0]		= 125;
loadhend[10..0]		= 727;
loadvstart[10..0]		= 71;
loadvend[10..0]		= 410;
WHEN 22 => 	
loadhstart[10..0]		= 110;
loadhend[10..0]		= 742;
loadvstart[10..0]		= 62;
loadvend[10..0]		= 418;
WHEN 23 => 	
loadhstart[10..0]		= 96;
loadhend[10..0]		= 756;
loadvstart[10..0]		= 54;
loadvend[10..0]		= 426;
WHEN 24 => 	
loadhstart[10..0]		= 83;
loadhend[10..0]		= 770;
loadvstart[10..0]		= 47;
loadvend[10..0]		= 434;
WHEN 25 => 	
loadhstart[10..0]		= 70;
loadhend[10..0]		= 783;
loadvstart[10..0]		= 39;
loadvend[10..0]		= 441;
WHEN 26 => 	
loadhstart[10..0]		= 57;
loadhend[10..0]		= 795;
loadvstart[10..0]		= 32;
loadvend[10..0]		= 448;
WHEN 27 => 	
loadhstart[10..0]		= 45;
loadhend[10..0]		= 807;
loadvstart[10..0]		= 26;
loadvend[10..0]		= 455;
WHEN 28 => 	
loadhstart[10..0]		= 33;
loadhend[10..0]		= 819;
loadvstart[10..0]		= 19;
loadvend[10..0]		= 462;
WHEN 29 => 	
loadhstart[10..0]		= 22;
loadhend[10..0]		= 830;
loadvstart[10..0]		= 13;
loadvend[10..0]		= 468;
WHEN 30 => 	
loadhstart[10..0]		= 11;
loadhend[10..0]		= 841;
loadvstart[10..0]		= 6;
loadvend[10..0]		= 474;
WHEN 31 => 	
loadhstart[10..0]		= 0;
loadhend[10..0]		= 852;
loadvstart[10..0]		= 0;
loadvend[10..0]		= 480;
END CASE;

Red_out[9..0] = Red_art[9..0];
Green_out[9..0] = Green_art[9..0];
Blue_out[9..0] = Blue_art[9..0];

Red_art[].clk = klok;
Green_art[].clk = klok;
Blue_art[].clk = klok;

----------------------------------------------------------------------------------
--TMF flashing screen section
----------------------------------------------------------------------------------
%field_counter.sclr = field_compare.aeb;
field_counter.clock = GLOBAL(clock);
field_counter.clk_en = Vout_pulse;

--timing of on-and off time is arbitrary : See Age van Dalfsen
field_compare.dataa[7..0] = field_counter.q[12..5];
field_compare.datab[7..0] = (fullregbuf[38..32],0);     --time that the display is reset : T   (time= x *64*Tfield seconds)
--field_compare.datab[7..0] = 8;
field_compare.clock = Global(clock);


field_compare_out.dataa[7..0] = field_counter.q[12..5];
field_compare_out.datab[7..0] = (fullregbuf[45..39],0);  --time-point that the display is set to black: t  (time = x *64*Tfield)
--field_compare_out.datab[7..0] = 4;
field_compare_out.clock = Global(clock);
%


----------------------------------------------------------------------------------
--cross hatch section
----------------------------------------------------------------------------------
cross_hatch_H_compare.dataa[3..0] = cross_hatch_H_counter.q[3..0];  --H-compare: every N dots 1 dot will be white
cross_hatch_H_compare.datab[3..0] = 3;
cross_hatch_H_compare.clock = klok;

cross_hatch_V_compare.dataa[2..0] = cross_hatch_V_counter.q[2..0];  --V-compare: every N lines 1 line will be white
cross_hatch_V_compare.datab[2..0] = 7;
cross_hatch_V_compare.clock = klok;

cross_hatch_V_counter.clock = start_h.aeb;
cross_hatch_V_counter.sclr = start_V.aeb; --reset the Vcounter every field

cross_hatch_H_counter.clock = klok;
cross_hatch_H_counter.sclr = start_h.aeb; --reset the Hcounter every line

diag_pl_counter.clk_en = start_h.aeb OR start_h_delay[0].q;
diag_pl_counter.clock = klok;
diag_pl_counter.sclr = start_v.aeb;

diag_pl_co_counter.clk_en = start_h.aeb OR start_h_delay[0].q OR start_nv_pulse;
diag_pl_co_counter.clock = klok;
diag_pl_co_counter.sclr = start_v.aeb;

diag_counter.clock = klok;
diag_counter.sload = start_h.aeb;
IF field_ident THEN
  diag_counter.data[] = diag_pl_counter.q[];
ELSE
  diag_counter.data[] = diag_pl_co_counter.q[];
END IF;
diag_counter.sclr = start_v_pulse;

diag_compare.dataa[3..0] = diag_counter.q[3..0]; 
diag_compare.datab[3..0] = 0;
diag_compare.clock = klok;

cross.d = (cross_hatch_H_compare.aeb OR (cross_hatch_V_compare.aeb AND Field_ident) OR diag_compare.aeb);
--cross.d = (cross_hatch_H_compare.aeb OR (cross_hatch_V_compare.aeb AND Field_ident));
cross.clk = klok;

----------------------------------------------------------------------------------
--NOP anti-error section
----------------------------------------------------------------------------------

SDA_out = GND;

----------------------------------------------------------------------------------
--worst case adressing current section.
----------------------------------------------------------------------------------

adressingR.clk = klok;
adressingR.d	=	set_subpix.q XOR act_counter.q[0];
adressingG.clk = klok;
adressingG.d	=	(NOT set_subpix.q) XOR act_counter.q[0];
adressingB.clk = klok;
adressingB.d	=	set_subpix.q XOR act_counter.q[0];



set_subpix.d = act_vcounter.q[1];
set_subpix.clk = klok;


prot_counter.aclr = adres_mode_active_pulse.q;
prot_counter.clock = GLOBAL(clock);
prot_counter.clk_en = Vout_pulse;

adres_mode_active.clk = klok;
adres_mode_active_delay.clk = klok;
adres_mode_active_delay.d = adres_mode_active.q;
adres_mode_active_pulse.clk = klok;
adres_mode_active_pulse.d = adres_mode_active.q AND NOT adres_mode_active_delay.q;

allow_adres_pattern.S = adres_mode_active_pulse.q;
allow_adres_pattern.clk = klok;
allow_adres_pattern.R = (prot_counter.q[] == 300);
--300 fields@60Hz = 5 seconds, after this time pattern will disappear

--adres_mode_active			:	DFF;
--adres_mode_active_delay		:	DFF;
--adres_mode_active_pulse		:	DFF;
--inhibit_adres_pattern			:	SRFF;


----------------------------------------------------------------------------------
--Colourbar definition section
----------------------------------------------------------------------------------

colorbar_reset.dataa[10..0] = 105;  --one pulse every 106 pixels: every pulse defines the edge to
									--a new color of the bar pattern
colorbar_reset.datab[10..0] = colorbar_counter.q[10..0];
colorbar_reset.clock = klok;

colorbar_counter.clock = klok;
colorbar_counter.sclr = colorbar_reset.aeb OR NOT(nblank_art_delay1.q);  

bar_counter.clock 	= klok;
bar_counter.clk_en 	= colorbar_reset.aeb OR NOT(nblank_art_delay1.q);		--this counts the number of pulses from colorbar_reset
bar_counter.sclr 	= NOT(nblank_art_delay1.q);		--every count=new color

--test[9..7] = bar_counter.q[2..0];
test[9] = colourbar_r.q;
test[8] = colourbar_g.q;
test[7] = colourbar_b.q;

CASE bar_counter.q[2..0] IS    
WHEN 0=>
  colourbar_g.d = VCC;
  colourbar_r.d = VCC;
  colourbar_b.d = VCC;
WHEN 1=>
  colourbar_g.d = VCC;
  colourbar_r.d = VCC;
  colourbar_b.d = GND;
WHEN 2=>
  colourbar_g.d = VCC;
  colourbar_r.d = GND;
  colourbar_b.d = VCC;
WHEN 3=>
  colourbar_g.d = VCC;
  colourbar_r.d = GND;
  colourbar_b.d = GND;
WHEN 4=>
  colourbar_g.d = GND;
  colourbar_r.d = VCC;
  colourbar_b.d = VCC;
WHEN 5=>
  colourbar_g.d = GND;
  colourbar_r.d = VCC;
  colourbar_b.d = GND;
WHEN 6=>
  colourbar_g.d = GND;
  colourbar_r.d = GND;
  colourbar_b.d = VCC;
WHEN 7=>
  colourbar_g.d = GND;
  colourbar_r.d = GND;
  colourbar_b.d = GND;
END CASE;

colourbar_r.clk = klok;
colourbar_g.clk = klok;
colourbar_b.clk = klok;
----------------------------------------------------------------------------------
--live source in-section
----------------------------------------------------------------------------------


Red_in[].clk = klok;
Green_in[].clk = klok;
Blue_in[].clk = klok;

--Red_in[9..0].d = Red[9..0];
--Green_in[9..0].d = Green[9..0];
--Blue_in[9..0].d = Blue[9..0];

Red_in[9..2].d = Red[7..0];
Green_in[9..2].d = Green[7..0];
--Blue_in[9..2].d = Blue[7..0];
Blue_in[2] = Blue[7];
Blue_in[9..3] = Blue[6..0];

Red_in[1..0].d = 0;
Green_in[1..0].d = 0;
Blue_in[1..0].d = 0;



NBLANKin_buf.D = NBLANKin;
NBLANKin_buf.clk = klok;


Hsync_buf.D = HSYNC;
Hsync_buf.clk = klok;

Vsync_buf.D = VSYNC;
Vsync_buf.clk = klok;


----------------------------------------------------------------------------------
--Freerun section
----------------------------------------------------------------------------------
fullreg.clock = klok;
fullreg.data[7..0] = Xpander[7..0];

fullregbuf[].clk = klok;
fullregbuf[].d = fullreg.Xout[];
fullregbuf[].ena = vout_pulse;

--	q[10..0] = lpm_counter_component.q[10..0];
h_counter.sclr = start_h.aeb;
h_counter.clock = klok;

act_counter.sclr = NOT (nblank_art.q);
act_counter.clock = klok;

act_vcounter.sclr = NOT (nblankv_art.q);
act_vcounter.clk_en  = start_h.aeb;
act_vcounter.clock = klok;

v_counter.sclr = start_v.ageb;
v_counter.clk_en  = start_h.aeb OR start_v.ageb;
v_counter.clock = klok;


start_ramp1.dataa[10..0] = act_vcounter.q[10..0];
start_ramp1.datab[10..0] = 0;
start_ramp1.clock = klok;

start_ramp2.dataa[10..0] = act_vcounter.q[10..0];
start_ramp2.datab[10..0] = 120;
start_ramp2.clock = klok;

start_ramp3.dataa[10..0] = act_vcounter.q[10..0];
start_ramp3.datab[10..0] = 240;
start_ramp3.clock = klok;

start_ramp4.dataa[10..0] = act_vcounter.q[10..0];
start_ramp4.datab[10..0] = 360;
start_ramp4.clock = klok;



hpos1.dataa[10..0] = act_counter.q[10..0];
hpos1.datab[10..0] = 95;
hpos1.clock = klok;

hpos2.dataa[10..0] = act_counter.q[10..0];
hpos2.datab[10..0] = 379;
hpos2.clock = klok;

hpos3.dataa[10..0] = act_counter.q[10..0];
hpos3.datab[10..0] = 663;
hpos3.clock = klok;


hpos5.dataa[10..0] = act_counter.q[10..0];
hpos5.datab[10..0] = 189;
hpos5.clock = klok;

hpos6.dataa[10..0] = act_counter.q[10..0];
hpos6.datab[10..0] = 473;
hpos6.clock = klok;

hpos7.dataa[10..0] = act_counter.q[10..0];
hpos7.datab[10..0] = 758;
hpos7.clock = klok;


vpos1.dataa[10..0] = act_vcounter.q[10..0];
vpos1.datab[10..0] = 57;
vpos1.clock = klok;

vpos2.dataa[10..0] = act_vcounter.q[10..0];
vpos2.datab[10..0] = 227;
vpos2.clock = klok;