serials.tdf

基于fpga的屏幕测试程序

-- serials.tdf
-- By Chai Lin
-- 2006-08-27

include "fran_pg.inc";
include "lpm_counter.inc";
include "lpm_compare.inc";

SUBDESIGN serials
(
	clk					: INPUT;
	clk_en				: INPUT;
	reset				: INPUT;
	time0[7..0]			: INPUT;
	time1[7..0]			: INPUT;
	time2[7..0]			: INPUT;
	time3[7..0]			: INPUT;
	time4[7..0]			: INPUT;
	time5[7..0]			: INPUT;
	
	red_in0[9..0]       : INPUT;
	green_in0[9..0]     : INPUT;
	blue_in0[9..0]      : INPUT;
	
	red_in1[9..0]       : INPUT;
	green_in1[9..0]     : INPUT;
	blue_in1[9..0]      : INPUT;
	
	red_in2[9..0]       : INPUT;
	green_in2[9..0]     : INPUT;
	blue_in2[9..0]      : INPUT;
	
	red_in3[9..0]       : INPUT;
	green_in3[9..0]     : INPUT;
	blue_in3[9..0]      : INPUT;
	
	red_in4[9..0]       : INPUT;
	green_in4[9..0]     : INPUT;
	blue_in4[9..0]      : INPUT;
	
	red_out[9..0]      	: OUTPUT;
	green_out[9..0]    	: OUTPUT;
	blue_out[9..0]     	: OUTPUT;
	trigger_out			: OUTPUT;
)

VARIABLE
	counter0,
	counter1,
	counter2,
	counter3,
	counter4,
	counter5	: lpm_counter WITH (
						LPM_WIDTH = 8,
						LPM_DIRECTION = "UP"
						);
	
	compare0,					
    compare1,
    compare2,
    compare3,
    compare4,
    compare5 	: lpm_compare WITH (
				                    LPM_WIDTH = 8,
									ONE_INPUT_IS_CONSTANT = "YES",
									LPM_REPRESENTATION = "UNSIGNED",
									LPM_PIPELINE = 2
									);
									
	SS	:	MACHINE OF BITS (phase[5..0])
			WITH STATES(
						idle = B"000001",
						s1   = B"000010",
						s2   = B"000100",
						s3   = B"001000",
						s4   = B"010000",
						s5   = B"100000" 
						);	
	
	Red_dff[9..0]	:	DFF;
	Green_dff[9..0]	:	DFF;
	Blue_dff[9..0]	:	DFF;
	trigger_dffe	:	DFFE;
	
    RedValue[9..0]	: 	NODE;
    GreValue[9..0]	: 	NODE;
    BluValue[9..0] 	: 	NODE;
	tri_flag		:	NODE;
BEGIN
	SS.clk = clk;
	SS.ena = clk_en;
	SS.reset = reset;
	
	counter0.clock = clk;
	counter1.clock = clk;
	counter2.clock = clk;
	counter3.clock = clk;
	counter4.clock = clk;
	counter5.clock = clk;
	
	counter0.clk_en = clk_en;
	counter1.clk_en = clk_en;
	counter2.clk_en = clk_en;
	counter3.clk_en = clk_en;
	counter4.clk_en = clk_en;
	counter5.clk_en = clk_en;
	
	%
	counter0.sclr = compare0.aeb;
	counter1.sclr = compare1.aeb;
	counter2.sclr = compare2.aeb;
	counter3.sclr = compare3.aeb;
	counter4.sclr = compare4.aeb;
	counter5.sclr = compare5.aeb;
	%
		
	counter0.cnt_en = idle;
	counter1.cnt_en = s1;
	counter2.cnt_en = s2;
	counter3.cnt_en = s3;
	counter4.cnt_en = s4;
	counter5.cnt_en = s5;
	
	compare0.clock = clk;
	compare1.clock = clk;
	compare2.clock = clk;
	compare3.clock = clk;
	compare4.clock = clk;
	compare5.clock = clk;
	
	compare0.dataa[] = counter0.q[];
	compare0.datab[] = time0[];
	compare1.dataa[] = counter1.q[];
	compare1.datab[] = time1[];
	compare2.dataa[] = counter2.q[];
	compare2.datab[] = time2[];
	compare3.dataa[] = counter3.q[];
	compare3.datab[] = time3[];
	compare4.dataa[] = counter4.q[];
	compare4.datab[] = time4[];
	compare5.dataa[] = counter5.q[];
	compare5.datab[] = time5[];


	CASE SS IS
	   WHEN idle =>
			IF compare0.aeb THEN
				counter0.sclr = VCC;
				SS = s1;
			 ELSE
				SS = idle;
				counter0.sclr = GND;
			END IF;
		
	   WHEN s1 =>
			IF compare1.aeb THEN
				counter1.sclr = VCC;
				SS = s2;
			 ELSE 
				SS = s1;
				counter1.sclr = GND;
			END IF;
	   
	   WHEN s2 =>
			IF compare2.aeb THEN
				counter2.sclr = VCC;
				SS = s3;
			 ELSE 
				SS = s2;
				counter2.sclr = GND;
			END IF;

	   WHEN s3 =>
			IF compare3.aeb THEN
				counter3.sclr = VCC;
				SS = s4;
			 ELSE 
				SS = s3;
				counter3.sclr = GND;
			END IF;
	   
	   WHEN s4 =>
			IF compare4.aeb THEN
				counter4.sclr = VCC;
				SS = s5;
			 ELSE 
				SS = s4;
				counter4.sclr = GND;
			END IF;
	   
	   WHEN s5 =>
			IF compare5.aeb THEN
				counter5.sclr = VCC;
				SS = s1;
			 ELSE 
				SS = s5;
				counter5.sclr = GND;
			END IF;
	   
	   WHEN OTHERS =>
			SS = idle;
    END CASE;


   CASE SS IS
	   WHEN   idle   =>
		RedValue[9..0] = 0;
		GreValue[9..0] = 0;
		BluValue[9..0] = 0;
		tri_flag 	   = GND;  
	   WHEN   s1   =>
		RedValue[9..0] = red_in0[9..0];
		GreValue[9..0] = green_in0[9..0];
		BluValue[9..0] = blue_in0[9..0]; 
	    tri_flag 	   = VCC;
	   WHEN   s2   =>
		RedValue[9..0] = red_in1[9..0];
		GreValue[9..0] = green_in1[9..0];
		BluValue[9..0] = blue_in1[9..0];
		tri_flag       = GND; 
	   WHEN   s3   =>
		RedValue[9..0] = red_in2[9..0];
		GreValue[9..0] = green_in2[9..0];
		BluValue[9..0] = blue_in2[9..0];
		tri_flag       = GND;
	   WHEN   s4   =>
		RedValue[9..0] = red_in3[9..0];
		GreValue[9..0] = green_in3[9..0];
		BluValue[9..0] = blue_in3[9..0];
		tri_flag       = GND;  
	   WHEN   s5   =>
		RedValue[9..0] = red_in4[9..0];
		GreValue[9..0] = green_in4[9..0];
		BluValue[9..0] = blue_in4[9..0];
		tri_flag       = GND;  
	   WHEN OTHERS => 
		RedValue[9..0] = 0;
		GreValue[9..0] = 0;
		BluValue[9..0] = 0;
		tri_flag       = GND;   
   END CASE;

	Red_dff[].clk   = clk;
	Green_dff[].clk = clk;
	Blue_dff[].clk  = clk;
	
	Red_dff[].d   	= RedValue[];
	Green_dff[].d 	= GreValue[];
	Blue_dff[].d  	= BluValue[];
	
	Red_out[]		= Red_dff[].q;
	Green_out[]		= Green_dff[].q;
	Blue_out[]		= Blue_dff[].q;
	
	trigger_dffe.clk	= clk;
	trigger_dffe.ena	= clk_en;
	trigger_dffe.d		= tri_flag;
	trigger_out			= trigger_dffe.q ; 
END;