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可以受上位机控制的通过fpga的视频信号发生器程序

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--hcountreg[10] is hcountreg[10]
--operation mode is normal

hcountreg[10]_carry_eqn = A1L73;
hcountreg[10]_lut_out = hcountreg[10] $ (!hcountreg[10]_carry_eqn);
hcountreg[10] = DFFEAS(hcountreg[10]_lut_out, clk, !A1L092, , , , , , );


--hcountreg[9] is hcountreg[9]
--operation mode is arithmetic

hcountreg[9]_carry_eqn = A1L53;
hcountreg[9]_lut_out = hcountreg[9] $ (hcountreg[9]_carry_eqn);
hcountreg[9] = DFFEAS(hcountreg[9]_lut_out, clk, !A1L092, , , , , , );

--A1L73 is hcountreg[9]~381
--operation mode is arithmetic

A1L73 = CARRY(!A1L53 # !hcountreg[9]);


--hcountreg[8] is hcountreg[8]
--operation mode is arithmetic

hcountreg[8]_carry_eqn = A1L33;
hcountreg[8]_lut_out = hcountreg[8] $ (!hcountreg[8]_carry_eqn);
hcountreg[8] = DFFEAS(hcountreg[8]_lut_out, clk, !A1L092, , , , , , );

--A1L53 is hcountreg[8]~385
--operation mode is arithmetic

A1L53 = CARRY(hcountreg[8] & (!A1L33));


--hcountreg[6] is hcountreg[6]
--operation mode is arithmetic

hcountreg[6]_carry_eqn = A1L92;
hcountreg[6]_lut_out = hcountreg[6] $ (!hcountreg[6]_carry_eqn);
hcountreg[6] = DFFEAS(hcountreg[6]_lut_out, clk, !A1L092, , , , , , );

--A1L13 is hcountreg[6]~389
--operation mode is arithmetic

A1L13 = CARRY(hcountreg[6] & (!A1L92));


--hcountreg[7] is hcountreg[7]
--operation mode is arithmetic

hcountreg[7]_carry_eqn = A1L13;
hcountreg[7]_lut_out = hcountreg[7] $ (hcountreg[7]_carry_eqn);
hcountreg[7] = DFFEAS(hcountreg[7]_lut_out, clk, !A1L092, , , , , , );

--A1L33 is hcountreg[7]~393
--operation mode is arithmetic

A1L33 = CARRY(!A1L13 # !hcountreg[7]);


--A1L64 is LessThan~1177
--operation mode is normal

A1L64 = !hcountreg[9] & !hcountreg[8] & !hcountreg[6] & !hcountreg[7];


--hcountreg[4] is hcountreg[4]
--operation mode is arithmetic

hcountreg[4]_carry_eqn = A1L52;
hcountreg[4]_lut_out = hcountreg[4] $ (!hcountreg[4]_carry_eqn);
hcountreg[4] = DFFEAS(hcountreg[4]_lut_out, clk, !A1L092, , , , , , );

--A1L72 is hcountreg[4]~397
--operation mode is arithmetic

A1L72 = CARRY(hcountreg[4] & (!A1L52));


--hcountreg[5] is hcountreg[5]
--operation mode is arithmetic

hcountreg[5]_carry_eqn = A1L72;
hcountreg[5]_lut_out = hcountreg[5] $ (hcountreg[5]_carry_eqn);
hcountreg[5] = DFFEAS(hcountreg[5]_lut_out, clk, !A1L092, , , , , , );

--A1L92 is hcountreg[5]~401
--operation mode is arithmetic

A1L92 = CARRY(!A1L72 # !hcountreg[5]);


--A1L04 is hs~587
--operation mode is normal

A1L04 = A1L64 & (!hcountreg[4] & !hcountreg[5]);


--hcountreg[1] is hcountreg[1]
--operation mode is arithmetic

hcountreg[1]_carry_eqn = A1L91;
hcountreg[1]_lut_out = hcountreg[1] $ (hcountreg[1]_carry_eqn);
hcountreg[1] = DFFEAS(hcountreg[1]_lut_out, clk, !A1L092, , , , , , );

--A1L12 is hcountreg[1]~405
--operation mode is arithmetic

A1L12 = CARRY(!A1L91 # !hcountreg[1]);


--hcountreg[3] is hcountreg[3]
--operation mode is arithmetic

hcountreg[3]_carry_eqn = A1L32;
hcountreg[3]_lut_out = hcountreg[3] $ (hcountreg[3]_carry_eqn);
hcountreg[3] = DFFEAS(hcountreg[3]_lut_out, clk, !A1L092, , , , , , );

--A1L52 is hcountreg[3]~409
--operation mode is arithmetic

A1L52 = CARRY(!A1L32 # !hcountreg[3]);


--hcountreg[2] is hcountreg[2]
--operation mode is arithmetic

hcountreg[2]_carry_eqn = A1L12;
hcountreg[2]_lut_out = hcountreg[2] $ (!hcountreg[2]_carry_eqn);
hcountreg[2] = DFFEAS(hcountreg[2]_lut_out, clk, !A1L092, , , , , , );

--A1L32 is hcountreg[2]~413
--operation mode is arithmetic

A1L32 = CARRY(hcountreg[2] & (!A1L12));


--A1L74 is LessThan~1178
--operation mode is normal

A1L74 = !hcountreg[3] & !hcountreg[2];


--A1L14 is hs~588
--operation mode is normal

A1L14 = hcountreg[4] & hcountreg[6] & (hcountreg[1] # !A1L74);


--A1L24 is hs~589
--operation mode is normal

A1L24 = hcountreg[7] # A1L14 # hcountreg[6] & hcountreg[5];


--G1L1 is rgb:u4|LessThan~3069
--operation mode is normal

G1L1 = hcountreg[3] & hcountreg[2];


--F1L14 is shinning:U3|LessThan~363
--operation mode is normal

F1L14 = hcountreg[6] & hcountreg[7] & hcountreg[5];


--refresh[0] is refresh[0]
--operation mode is normal

refresh[0]_lut_out = C1_Xoutbuf5[5];
refresh[0] = DFFEAS(refresh[0]_lut_out, clk, VCC, , clken_fcount, , , , );


--refresh[1] is refresh[1]
--operation mode is normal

refresh[1]_lut_out = C1_Xoutbuf5[6];
refresh[1] = DFFEAS(refresh[1]_lut_out, clk, VCC, , clken_fcount, , , , );


--A1L563 is VTOT[6]~34
--operation mode is normal

A1L563 = refresh[0] & (!refresh[1]);


--A1L34 is hs~590
--operation mode is normal

A1L34 = hcountreg[8] & (A1L24 # !A1L563) # !hcountreg[8] & (A1L54 & !A1L563);


--A1L44 is hs~591
--operation mode is normal

A1L44 = hcountreg[10] # A1L04 # hcountreg[9] & A1L34;


--vcountreg[7] is vcountreg[7]
--operation mode is arithmetic

vcountreg[7]_carry_eqn = A1L643;
vcountreg[7]_lut_out = vcountreg[7] $ (vcountreg[7]_carry_eqn);
vcountreg[7] = DFFEAS(vcountreg[7]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L843 is vcountreg[7]~595
--operation mode is arithmetic

A1L843 = CARRY(!A1L643 # !vcountreg[7]);


--vcountreg[5] is vcountreg[5]
--operation mode is arithmetic

vcountreg[5]_carry_eqn = A1L243;
vcountreg[5]_lut_out = vcountreg[5] $ (vcountreg[5]_carry_eqn);
vcountreg[5] = DFFEAS(vcountreg[5]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L443 is vcountreg[5]~599
--operation mode is arithmetic

A1L443 = CARRY(!A1L243 # !vcountreg[5]);


--vcountreg[6] is vcountreg[6]
--operation mode is arithmetic

vcountreg[6]_carry_eqn = A1L443;
vcountreg[6]_lut_out = vcountreg[6] $ (!vcountreg[6]_carry_eqn);
vcountreg[6] = DFFEAS(vcountreg[6]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L643 is vcountreg[6]~603
--operation mode is arithmetic

A1L643 = CARRY(vcountreg[6] & (!A1L443));


--A1L753 is vs~747
--operation mode is normal

A1L753 = !vcountreg[7] & !vcountreg[5] & !vcountreg[6];


--vcountreg[4] is vcountreg[4]
--operation mode is arithmetic

vcountreg[4]_carry_eqn = A1L043;
vcountreg[4]_lut_out = vcountreg[4] $ (!vcountreg[4]_carry_eqn);
vcountreg[4] = DFFEAS(vcountreg[4]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L243 is vcountreg[4]~607
--operation mode is arithmetic

A1L243 = CARRY(vcountreg[4] & (!A1L043));


--vcountreg[2] is vcountreg[2]
--operation mode is arithmetic

vcountreg[2]_carry_eqn = A1L633;
vcountreg[2]_lut_out = vcountreg[2] $ (!vcountreg[2]_carry_eqn);
vcountreg[2] = DFFEAS(vcountreg[2]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L833 is vcountreg[2]~611
--operation mode is arithmetic

A1L833 = CARRY(vcountreg[2] & (!A1L633));


--vcountreg[3] is vcountreg[3]
--operation mode is arithmetic

vcountreg[3]_carry_eqn = A1L833;
vcountreg[3]_lut_out = vcountreg[3] $ (vcountreg[3]_carry_eqn);
vcountreg[3] = DFFEAS(vcountreg[3]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L043 is vcountreg[3]~615
--operation mode is arithmetic

A1L043 = CARRY(!A1L833 # !vcountreg[3]);


--D1L894 is moving_object:U1|LessThan~3008
--operation mode is normal

D1L894 = vcountreg[4] & (vcountreg[2] # vcountreg[3]);


--vcountreg[8] is vcountreg[8]
--operation mode is arithmetic

vcountreg[8]_carry_eqn = A1L843;
vcountreg[8]_lut_out = vcountreg[8] $ (!vcountreg[8]_carry_eqn);
vcountreg[8] = DFFEAS(vcountreg[8]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L053 is vcountreg[8]~619
--operation mode is arithmetic

A1L053 = CARRY(vcountreg[8] & (!A1L843));


--vcountreg[9] is vcountreg[9]
--operation mode is arithmetic

vcountreg[9]_carry_eqn = A1L053;
vcountreg[9]_lut_out = vcountreg[9] $ (vcountreg[9]_carry_eqn);
vcountreg[9] = DFFEAS(vcountreg[9]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L253 is vcountreg[9]~623
--operation mode is arithmetic

A1L253 = CARRY(!A1L053 # !vcountreg[9]);


--A1L41 is de_out~37
--operation mode is normal

A1L41 = vcountreg[8] & (A1L753 & !D1L894 # !vcountreg[9]) # !vcountreg[8] & (D1L894 # vcountreg[9] # !A1L753);


--vcountreg[10] is vcountreg[10]
--operation mode is arithmetic

vcountreg[10]_carry_eqn = A1L253;
vcountreg[10]_lut_out = vcountreg[10] $ (!vcountreg[10]_carry_eqn);
vcountreg[10] = DFFEAS(vcountreg[10]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L453 is vcountreg[10]~627
--operation mode is arithmetic

A1L453 = CARRY(vcountreg[10] & (!A1L253));


--vcountreg[11] is vcountreg[11]
--operation mode is normal

vcountreg[11]_carry_eqn = A1L453;
vcountreg[11]_lut_out = vcountreg[11] $ (vcountreg[11]_carry_eqn);
vcountreg[11] = DFFEAS(vcountreg[11]_lut_out, clk, !A1L103, , clken_vcount, , , , );


--A1L192 is reduce_nor~208
--operation mode is normal

A1L192 = !vcountreg[10] & !vcountreg[11];


--A1L84 is LessThan~1179
--operation mode is normal

A1L84 = !hcountreg[5] # !hcountreg[4] # !hcountreg[3];


--A1L51 is de_out~38
--operation mode is normal

A1L51 = A1L192 & !hcountreg[10] & (!A1L84 # !A1L64);


--A1L94 is LessThan~1180
--operation mode is normal

A1L94 = !hcountreg[8] & (A1L74 & !hcountreg[4] # !F1L14);


--A1L61 is de_out~39
--operation mode is normal

A1L61 = A1L41 & A1L51 & (A1L94 # !hcountreg[9]);


--A1L853 is vs~748
--operation mode is normal

A1L853 = !vcountreg[8] & !vcountreg[9];


--vcountreg[1] is vcountreg[1]
--operation mode is arithmetic

vcountreg[1]_carry_eqn = A1L433;
vcountreg[1]_lut_out = vcountreg[1] $ (vcountreg[1]_carry_eqn);
vcountreg[1] = DFFEAS(vcountreg[1]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L633 is vcountreg[1]~635
--operation mode is arithmetic

A1L633 = CARRY(!A1L433 # !vcountreg[1]);


--vcountreg[0] is vcountreg[0]
--operation mode is arithmetic

vcountreg[0]_lut_out = !vcountreg[0];
vcountreg[0] = DFFEAS(vcountreg[0]_lut_out, clk, !A1L103, , clken_vcount, , , , );

--A1L433 is vcountreg[0]~639
--operation mode is arithmetic

A1L433 = CARRY(vcountreg[0]);


--A1L05 is LessThan~1181
--operation mode is normal

A1L05 = !vcountreg[1] & !vcountreg[0] # !vcountreg[2];


--A1L953 is vs~749
--operation mode is normal

A1L953 = !vcountreg[4] & !vcountreg[3];


--A1L063 is vs~750
--operation mode is normal

A1L063 = A1L753 & A1L853 & A1L05 & A1L953;


--A1L292 is reduce_nor~209
--operation mode is normal

A1L292 = vcountreg[8] & vcountreg[9];


--A1L163 is vs~751
--operation mode is normal

A1L163 = vcountreg[4] & vcountreg[2] & (vcountreg[1] # A1L563);


--A1L392 is reduce_nor~210
--operation mode is normal

A1L392 = !vcountreg[5] & (vcountreg[6] $ (refresh[1] # !refresh[0]));


--A1L263 is vs~752
--operation mode is normal

A1L263 = A1L163 # vcountreg[4] & vcountreg[3] # !A1L392;


--A1L363 is vs~753
--operation mode is normal

A1L363 = vcountreg[7] # A1L263 & (vcountreg[6] # !A1L563);


--A1L463 is vs~754
--operation mode is normal

A1L463 = A1L063 # A1L292 & A1L363 # !A1L192;


--E1_trigger is shinningblock:U2|trigger
--operation mode is normal

E1_trigger_lut_out = E1L349;
E1_trigger = DFFEAS(E1_trigger_lut_out, clk, VCC, , E1L879, , , , );


--A1L152Q is out_r_e[0]~reg0
--operation mode is normal

A1L152Q_lut_out = out4_r_e[0] & (!rgb_sel[1]);
A1L152Q = DFFEAS(A1L152Q_lut_out, clk, VCC, , , , , , );


--A1L352Q is out_r_e[1]~reg0
--operation mode is normal

A1L352Q_lut_out = out4_r_e[1] & (!rgb_sel[1]);
A1L352Q = DFFEAS(A1L352Q_lut_out, clk, VCC, , , , , , );


--A1L552Q is out_r_e[2]~reg0
--operation mode is normal

A1L552Q_lut_out = out4_r_e[2] & (!rgb_sel[1]);
A1L552Q = DFFEAS(A1L552Q_lut_out, clk, VCC, , , , , , );


--A1L752Q is out_r_e[3]~reg0
--operation mode is normal

A1L752Q_lut_out = out4_r_e[3] & (!rgb_sel[1]);