shinning.vhd

可以受上位机控制的通过fpga的视频信号发生器程序

LIBRARY ieee ;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY shinning IS PORT
( clk    : IN std_logic;
  vcount : IN std_logic_vector(11 DOWNTO 0);
  hcount : IN std_logic_vector(10 DOWNTO 0);
  refresh: IN std_logic_vector(1 DOWNTO 0);
  time1  : IN std_logic_vector(3  DOWNTO 0);
  level1 : IN std_logic_vector(7  DOWNTO 0);
  clken_fcount: IN std_logic;
  out_r_e   : OUT std_logic_vector(7 DOWNTO 0);
  out_g_e   : OUT std_logic_vector(7 DOWNTO 0);
  out_b_e   : OUT std_logic_vector(7 DOWNTO 0);
  out_r_o   : OUT std_logic_vector(7 DOWNTO 0);
  out_g_o   : OUT std_logic_vector(7 DOWNTO 0);
  out_b_o   : OUT std_logic_vector(7 DOWNTO 0));

CONSTANT HAC:integer:=512;   -- horizontal active pixels 1448*1151
CONSTANT HSY:integer:=68;     -- horizontal sync width (negative polarity)
CONSTANT HBP:integer:=80;     -- horizontal back porch
CONSTANT VAC:integer:=768;    -- vertical active pixels
CONSTANT VSY:integer:=6;      -- vertical sync width (negative polarity)
CONSTANT VBP:integer:=29;     -- vertical back porch

END shinning;

ARCHITECTURE rtl OF shinning IS

SIGNAL inter : integer;
SIGNAL color : std_logic;
SIGNAL colorout : std_logic;
SIGNAL vf_temp : std_logic;
SIGNAL scountreg : std_logic_vector(8 DOWNTO 0);
SIGNAL dist: integer;

BEGIN
PROCESS(time1,refresh)
BEGIN
CASE time1&refresh IS
	WHEN  "000000"=>inter<=0;
	WHEN  "000100"=>inter<=1;
	WHEN  "001000"=>inter<=6;
    WHEN  "001100"=>inter<=12;
    WHEN  "010000"=>inter<=18;
    WHEN  "010100"=>inter<=24;
    WHEN  "011000"=>inter<=30;
    WHEN  "011100"=>inter<=36;
    WHEN  "100000"=>inter<=42;
    WHEN  "100100"=>inter<=48;
    WHEN  "101000"=>inter<=54;
    WHEN  "101100"=>inter<=60;
    WHEN  "000001"=>inter<=0;
	WHEN  "000101"=>inter<=1;
	WHEN  "001001"=>inter<=5;
    WHEN  "001101"=>inter<=10;
    WHEN  "010001"=>inter<=15;
    WHEN  "010101"=>inter<=20;
    WHEN  "011001"=>inter<=25;
    WHEN  "011101"=>inter<=30;
    WHEN  "100001"=>inter<=35;
    WHEN  "100101"=>inter<=40;
    WHEN  "101001"=>inter<=45;
    WHEN  "101101"=>inter<=50;
    WHEN  "000010"=>inter<=0;
	WHEN  "000110"=>inter<=1;
	WHEN  "001010"=>inter<=7;
    WHEN  "001110"=>inter<=14;
    WHEN  "010010"=>inter<=21;
    WHEN  "010110"=>inter<=28;
    WHEN  "011010"=>inter<=35;
    WHEN  "011110"=>inter<=42;
    WHEN  "100010"=>inter<=49;
    WHEN  "100110"=>inter<=56;
    WHEN  "101010"=>inter<=63;
    WHEN  "101110"=>inter<=70;
	WHEN  OTHERS =>inter<=0;
END CASE;
END PROCESS;

PROCESS(level1)
BEGIN
case level1 IS
 WHEN "00000000"=>dist<=0;
 WHEN "00000001"=>dist<=1;
 WHEN "00000010"=>dist<=2;
 WHEN "00000011"=>dist<=3;
 WHEN "00000100"=>dist<=4;
 WHEN "00000101"=>dist<=5;
 WHEN "00000110"=>dist<=6;
 WHEN "00000111"=>dist<=7;
 WHEN "00001000"=>dist<=8;
 WHEN "00001001"=>dist<=9;
 WHEN "00001010"=>dist<=10;
 WHEN "00001011"=>dist<=15;
 WHEN "00001100"=>dist<=20;
 WHEN "00001101"=>dist<=25;
 WHEN "00001110"=>dist<=50;
 WHEN "00001111"=>dist<=75;
 WHEN "00010000"=>dist<=100;
 WHEN "00010001"=>dist<=125;
 WHEN "00010010"=>dist<=150;
 WHEN "00010011"=>dist<=175;
 WHEN "00010100"=>dist<=200;
 WHEN "00010101"=>dist<=225;
 WHEN "00010110"=>dist<=250;
 WHEN "00010111"=>dist<=275;
 WHEN "00011000"=>dist<=300;
 WHEN "00011001"=>dist<=325;
 WHEN "00011010"=>dist<=350;
 WHEN "00011011"=>dist<=375;
 WHEN "00011100"=>dist<=400;
 WHEN "00011101"=>dist<=425;
 WHEN "00011110"=>dist<=450;
 WHEN "00011111"=>dist<=475;
 WHEN "00100000"=>dist<=500;
 WHEN  OTHERS =>dist<=0;
END CASE;
END PROCESS;

PROCESS(clk)
BEGIN
IF clk'event AND clk='1' THEN
IF (vcount=512+VBP+VSY-dist AND hcount<=HBP+HSY+332) OR
   (vcount=512+VBP+VSY+dist AND hcount>HBP+HSY+317)
THEN color<='1';
ELSE color<='0';
END IF;
END IF;
END PROCESS;

PROCESS(clk,vf_temp)
BEGIN
IF(vf_temp='1')THEN
scountreg<=(OTHERS=>'0');
ELSIF clk'event AND clk='1' THEN
IF clken_fcount='1' THEN
scountreg<=scountreg+1;
END IF;
END IF;
END PROCESS;

vf_temp<='1' when scountreg=(inter+inter) ELSE '0';

PROCESS(clk)
BEGIN
IF clk'event AND clk='1' THEN
IF scountreg<inter THEN colorout<='0';
ELSIF color='1' THEN colorout<='1';
ELSE colorout<='0';
END IF;
END IF;
END PROCESS;



out_r_e<="00000000" when colorout='0' ELSE "11111111";
out_g_e<="00000000" when colorout='0' ELSE "11111111";
out_b_e<="00000000" when colorout='0' ELSE "11111111";
out_r_o<="00000000" when colorout='0' ELSE "11111111";
out_g_o<="00000000" when colorout='0' ELSE "11111111";
out_b_o<="00000000" when colorout='0' ELSE "11111111";

END rtl;