qiangdaqi.hier_info

实现抢答器功能

|qiangdaqi
clkin => daoji10:u2.clk
clkin => qiangda:u1.clk
startin => daoji3:u3.rst
startin => daoji10:u2.rst
startin => qiangda:u1.start
sin[0] => qiangda:u1.s[0]
sin[1] => qiangda:u1.s[1]
sin[2] => qiangda:u1.s[2]
sin[3] => qiangda:u1.s[3]
sin[4] => qiangda:u1.s[4]
sin[5] => qiangda:u1.s[5]
sin[6] => qiangda:u1.s[6]
dt[0] <= qiangda:u1.data[0]
dt[1] <= qiangda:u1.data[1]
dt[2] <= qiangda:u1.data[2]
dt[3] <= qiangda:u1.data[3]
sh[0] <= daoji3:u3.CQ[0]
sh[1] <= daoji3:u3.CQ[1]
sh[2] <= daoji3:u3.CQ[2]
sh[3] <= daoji3:u3.CQ[3]
sl[0] <= daoji10:u2.CQ[0]
sl[1] <= daoji10:u2.CQ[1]
sl[2] <= daoji10:u2.CQ[2]
sl[3] <= daoji10:u2.CQ[3]


|qiangdaqi|qiangda:u1
clk => data[3]~reg0.CLK
clk => data[2]~reg0.CLK
clk => data[1]~reg0.CLK
clk => data[0]~reg0.CLK
clk => successful~reg0.CLK
clk => flag.CLK
suocuns => successful~0.OUTPUTSELECT
suocuns => process0~0.IN0
s[0] => Mux3.IN134
s[0] => Mux2.IN134
s[0] => Mux1.IN134
s[0] => Mux0.IN134
s[1] => Mux3.IN133
s[1] => Mux2.IN133
s[1] => Mux1.IN133
s[1] => Mux0.IN133
s[2] => Mux3.IN132
s[2] => Mux2.IN132
s[2] => Mux1.IN132
s[2] => Mux0.IN132
s[3] => Mux3.IN131
s[3] => Mux2.IN131
s[3] => Mux1.IN131
s[3] => Mux0.IN131
s[4] => Mux3.IN130
s[4] => Mux2.IN130
s[4] => Mux1.IN130
s[4] => Mux0.IN130
s[5] => Mux3.IN129
s[5] => Mux2.IN129
s[5] => Mux1.IN129
s[5] => Mux0.IN129
s[6] => Mux3.IN128
s[6] => Mux2.IN128
s[6] => Mux1.IN128
s[6] => Mux0.IN128
start => process0~0.IN1
start => flag~1.OUTPUTSELECT
start => successful~2.OUTPUTSELECT
start => data~7.OUTPUTSELECT
start => data~6.OUTPUTSELECT
start => data~5.OUTPUTSELECT
start => data~4.OUTPUTSELECT
data[0] <= data[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data[1] <= data[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data[2] <= data[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data[3] <= data[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
successful <= successful~reg0.DB_MAX_OUTPUT_PORT_TYPE


|qiangdaqi|daoji10:u2
EN => CL~3.OUTPUTSELECT
EN => CQI[3].ENA
EN => CQI[2].ENA
EN => CQI[1].ENA
EN => CQI[0].ENA
clk => CQI[3].CLK
clk => CQI[2].CLK
clk => CQI[1].CLK
clk => CQI[0].CLK
clk => CL~reg0.CLK
rst => CQI[3].PRESET
rst => CQI[2].ACLR
rst => CQI[1].ACLR
rst => CQI[0].PRESET
rst => CL~reg0.ENA
CQ[0] <= CQI[0].DB_MAX_OUTPUT_PORT_TYPE
CQ[1] <= CQI[1].DB_MAX_OUTPUT_PORT_TYPE
CQ[2] <= CQI[2].DB_MAX_OUTPUT_PORT_TYPE
CQ[3] <= CQI[3].DB_MAX_OUTPUT_PORT_TYPE
CL <= CL~reg0.DB_MAX_OUTPUT_PORT_TYPE


|qiangdaqi|daoji3:u3
EN => CL~0.OUTPUTSELECT
EN => CQI[3].ENA
EN => CQI[2].ENA
EN => CQI[1].ENA
EN => CQI[0].ENA
clk => CQI[3].CLK
clk => CQI[2].CLK
clk => CQI[1].CLK
clk => CQI[0].CLK
clk => CL~reg0.CLK
rst => CQI[3].ACLR
rst => CQI[2].ACLR
rst => CQI[1].PRESET
rst => CQI[0].PRESET
rst => CL~reg0.ENA
CQ[0] <= CQI[0].DB_MAX_OUTPUT_PORT_TYPE
CQ[1] <= CQI[1].DB_MAX_OUTPUT_PORT_TYPE
CQ[2] <= CQI[2].DB_MAX_OUTPUT_PORT_TYPE
CQ[3] <= CQI[3].DB_MAX_OUTPUT_PORT_TYPE
CL <= CL~reg0.DB_MAX_OUTPUT_PORT_TYPE