dds_all.map.qmsg

这个是相当不错的EDA编程

{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[14\] word.vhd(12) " "Warning (10034): Output port \"F\[14\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[13\] word.vhd(12) " "Warning (10034): Output port \"F\[13\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[12\] word.vhd(12) " "Warning (10034): Output port \"F\[12\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[11\] word.vhd(12) " "Warning (10034): Output port \"F\[11\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[10\] word.vhd(12) " "Warning (10034): Output port \"F\[10\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[9\] word.vhd(12) " "Warning (10034): Output port \"F\[9\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[8\] word.vhd(12) " "Warning (10034): Output port \"F\[8\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[7\] word.vhd(12) " "Warning (10034): Output port \"F\[7\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[6\] word.vhd(12) " "Warning (10034): Output port \"F\[6\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[5\] word.vhd(12) " "Warning (10034): Output port \"F\[5\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[4\] word.vhd(12) " "Warning (10034): Output port \"F\[4\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[3\] word.vhd(12) " "Warning (10034): Output port \"F\[3\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[2\] word.vhd(12) " "Warning (10034): Output port \"F\[2\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[1\] word.vhd(12) " "Warning (10034): Output port \"F\[1\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_OUTPUT_PORT" "F\[0\] word.vhd(12) " "Warning (10034): Output port \"F\[0\]\" at word.vhd(12) has no driver" {  } { { "word.vhd" "" { Text "E:/EDA/DDS_all/word.vhd" 12 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WSGN_EMPTY_SHELL" "word " "Warning: Entity \"word\" contains only dangling pins" {  } { { "DDS_ALL.bdf" "inst14" { Schematic "E:/EDA/DDS_all/DDS_ALL.bdf" { { 320 72 216 448 "inst14" "" } } } }  } 0 0 "Entity \"%1!s!\" contains only dangling pins" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "MODE1 MODE1:inst11 " "Info: Elaborating entity \"MODE1\" for hierarchy \"MODE1:inst11\"" {  } { { "DDS_ALL.bdf" "inst11" { Schematic "E:/EDA/DDS_all/DDS_ALL.bdf" { { 352 -152 16 448 "inst11" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "set_mode MODE1.vhd(33) " "Warning (10492): VHDL Process Statement warning at MODE1.vhd(33): signal \"set_mode\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "MODE1.vhd" "" { Text "E:/EDA/DDS_all/MODE1.vhd" 33 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "Pset MODE1.vhd(44) " "Warning (10492): VHDL Process Statement warning at MODE1.vhd(44): signal \"Pset\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "MODE1.vhd" "" { Text "E:/EDA/DDS_all/MODE1.vhd" 44 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "Pset MODE1.vhd(55) " "Warning (10492): VHDL Process Statement warning at MODE1.vhd(55): signal \"Pset\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "MODE1.vhd" "" { Text "E:/EDA/DDS_all/MODE1.vhd" 55 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "temp_fword MODE1.vhd(39) " "Warning (10631): VHDL Process Statement warning at MODE1.vhd(39): inferring latch(es) for signal or variable \"temp_fword\", which holds its previous value in one or more paths through the process" {  } { { "MODE1.vhd" "" { Text "E:/EDA/DDS_all/MODE1.vhd" 39 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "temp_cnt MODE1.vhd(39) " "Warning (10631): VHDL Process Statement warning at MODE1.vhd(39): inferring latch(es) for signal or variable \"temp_cnt\", which holds its previous value in one or more paths through the process" {  } { { "MODE1.vhd" "" { Text "E:/EDA/DDS_all/MODE1.vhd" 39 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "temp_Pword MODE1.vhd(39) " "Warning (10631): VHDL Process Statement warning at MODE1.vhd(39): inferring latch(es) for signal or variable \"temp_Pword\", which holds its previous value in one or more paths through the process" {  } { { "MODE1.vhd" "" { Text "E:/EDA/DDS_all/MODE1.vhd" 39 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/quartus/libraries/megafunctions/sld_hub.vhd 6 2 " "Info: Found 6 design units, including 2 entities, in source file d:/quartus/libraries/megafunctions/sld_hub.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 HUB_PACK " "Info: Found design unit 1: HUB_PACK" {  } { { "d:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/quartus/libraries/megafunctions/sld_hub.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 JTAG_PACK " "Info: Found design unit 2: JTAG_PACK" {  } { { "d:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/quartus/libraries/megafunctions/sld_hub.vhd" 63 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 sld_hub-rtl " "Info: Found design unit 3: sld_hub-rtl" {  } { { "d:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/quartus/libraries/megafunctions/sld_hub.vhd" 167 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 sld_jtag_state_machine-rtl " "Info: Found design unit 4: sld_jtag_state_machine-rtl" {  } { { "d:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/quartus/libraries/megafunctions/sld_hub.vhd" 1133 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_hub " "Info: Found entity 1: sld_hub" {  } { { "d:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/quartus/libraries/megafunctions/sld_hub.vhd" 99 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_jtag_state_machine " "Info: Found entity 2: sld_jtag_state_machine" {  } { { "d:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/quartus/libraries/megafunctions/sld_hub.vhd" 1118 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "sld_hub:sld_hub_inst " "Info: Elaborated megafunction instantiation \"sld_hub:sld_hub_inst\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine sld_hub:sld_hub_inst " "Info: Elaborated megafunction instantiation \"sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\", which is child of megafunction instantiation \"sld_hub:sld_hub_inst\"" {  } { { "d:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "d:/quartus/libraries/megafunctions/sld_hub.vhd" 564 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}