dds_all.qsf

这个是相当不错的EDA编程

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		DDS_ALL_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "09:07:06  SEPTEMBER 10, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name CPP_INCLUDE_FILE AD9850.h

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_16 -to CLK
set_location_assignment PIN_127 -to FOUT\[0\]
set_location_assignment PIN_128 -to FOUT\[1\]
set_location_assignment PIN_125 -to FOUT\[2\]
set_location_assignment PIN_126 -to FOUT\[3\]
set_location_assignment PIN_123 -to FOUT\[4\]
set_location_assignment PIN_124 -to FOUT\[5\]
set_location_assignment PIN_100 -to FOUT\[6\]
set_location_assignment PIN_83 -to FOUT\[7\]
set_location_assignment PIN_78 -to FOUT\[8\]
set_location_assignment PIN_77 -to FOUT\[9\]
set_location_assignment PIN_76 -to POUT\[0\]
set_location_assignment PIN_75 -to POUT\[1\]
set_location_assignment PIN_74 -to POUT\[2\]
set_location_assignment PIN_73 -to POUT\[3\]
set_location_assignment PIN_72 -to POUT\[4\]
set_location_assignment PIN_71 -to POUT\[5\]
set_location_assignment PIN_70 -to POUT\[6\]
set_location_assignment PIN_69 -to POUT\[7\]
set_location_assignment PIN_68 -to POUT\[8\]
set_location_assignment PIN_67 -to POUT\[9\]
set_location_assignment PIN_77 -to CLK40M
set_location_assignment PIN_34 -to Pset
set_location_assignment PIN_38 -to setk\[0\]
set_location_assignment PIN_37 -to setk\[1\]
set_location_assignment PIN_36 -to setk\[2\]
set_location_assignment PIN_35 -to setk\[3\]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY DDS_ALL

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C3T144C8

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF

set_global_assignment -name BDF_FILE dds.bdf
set_global_assignment -name VHDL_FILE MODE.vhd
set_global_assignment -name SOURCE_FILE SIN_ROM.cmp
set_global_assignment -name SOURCE_FILE tt.cmp
set_global_assignment -name SOURCE_FILE AD9850.h
set_global_assignment -name VHDL_FILE ADDER10B.VHD
set_global_assignment -name VHDL_FILE ADDER32B.VHD
set_global_assignment -name BDF_FILE DDS_ALL.bdf
set_global_assignment -name VHDL_FILE dds_vhdl.vhd
set_global_assignment -name VHDL_FILE REG10B.VHD
set_global_assignment -name VHDL_FILE REG32B.VHD
set_global_assignment -name VHDL_FILE SIN_ROM.VHD
set_global_assignment -name VHDL_FILE tt.vhd
set_global_assignment -name VHDL_FILE MODE1.vhd
set_global_assignment -name VHDL_FILE word.vhd