dds_vhdl.map.rpt

这个是相当不错的EDA编程

                     |-- sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:30:sm1
                     |-- sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:31:sm1
                     |-- sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:32:sm1
                     |-- sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:33:sm1
                     |-- sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:34:sm1
                     |-- sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:35:sm1
                |-- lpm_shiftreg:trigger_condition_deserialize
           |-- sld_ela_post_trigger_counter:\gen_non_zero_sample_depth:tc1
                |-- lpm_counter:post_trigger_counter
                     |-- cntr_en8:auto_generated
           |-- sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr
                |-- lpm_compare:\non_zero_sample_depth_gen:segment_addr_compare
                     |-- altshift:aeb_ext_lat_ffs
                     |-- altshift:agb_ext_lat_ffs
                     |-- comptree:comparator
                          |-- cmpchain:cmp_end
                               |-- comptree:comp
                                    |-- cmpchain:cmp
                                    |-- cmpchain:cmp[0]
                                    |-- cmpchain:cmp[1]
                                    |-- cmpchain:cmp[2]
                                    |-- cmpchain:cmp[3]
                                    |-- cmpchain:cmp_end
                                    |-- comptree:sub_comptree
                                         |-- cmpchain:cmp
                                         |-- cmpchain:cmp[0]
                                         |-- cmpchain:cmp_end
                                         |-- comptree:sub_comptree
                                              |-- cmpchain:cmp_end
                |-- lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter
                     |-- cntr_619:auto_generated
           |-- sld_mbpmg:\trigger_in_trigger_module_enabled_gen:trigger_in_match
                |-- sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1
           |-- sld_ela_level_seq_mgr:ela_level_seq_mgr
           |-- sld_ela_state_machine:sm1
           |-- sld_ela_seg_state_machine:sm2
           |-- lpm_shiftreg:trigger_config_deserialize
      |-- sld_acquisition_buffer:sld_acquisition_buffer_inst
           |-- lpm_ff:\gen_non_zero_sample_depth:trigger_address_register
           |-- lpm_counter:\write_address_non_zero_gen:write_pointer_counter
                |-- cntr_0r9:auto_generated
 |-- sld_hub:sld_hub_inst
      |-- sld_dffex:\GEN_IRF:1:IRF
      |-- sld_dffex:\GEN_IRF:2:IRF
      |-- sld_dffex:\GEN_IRF:3:IRF
      |-- sld_dffex:\GEN_SHADOW_IRF:1:S_IRF
      |-- sld_dffex:\GEN_SHADOW_IRF:2:S_IRF
      |-- sld_dffex:\GEN_SHADOW_IRF:3:S_IRF
      |-- sld_dffex:BROADCAST
      |-- sld_rom_sr:HUB_INFO_REG
      |-- lpm_decode:instruction_decoder
           |-- decode_9ie:auto_generated
      |-- sld_dffex:IRF_ENA
      |-- sld_dffex:IRF_ENA_0
      |-- sld_dffex:IRSR
      |-- lpm_shiftreg:jtag_ir_register
      |-- sld_jtag_state_machine:jtag_state_machine
      |-- sld_dffex:RESET
 |-- ADDER32B:u1
 |-- REG32B:u2
      |-- lpm_counter:DOUT_rtl_0
           |-- cntr_2u6:auto_generated
 |-- SIN_ROM:u3
      |-- altsyncram:altsyncram_component
           |-- altsyncram_gmu:auto_generated
                |-- altsyncram_8kc2:altsyncram1
                |-- sld_mod_ram_rom:mgl_prim2
                     |-- sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr
                     |-- lpm_counter:ram_rom_addr_reg_rtl_0
                          |-- cntr_kv8:auto_generated
                     |-- lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1
                          |-- cntr_pd8:auto_generated
 |-- ADDER10B:u4
 |-- REG10B:u5
 |-- SIN_ROM:u6
      |-- altsyncram:altsyncram_component
           |-- altsyncram_gmu:auto_generated
                |-- altsyncram_8kc2:altsyncram1
                |-- sld_mod_ram_rom:mgl_prim2
                     |-- sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr