dll_2x_board.vhd

VHDL的例子

LIBRARY IEEE;
LIBRARY UNISIM;
USE UNISIM.VCOMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY DLL_2X_BOARD IS 
	PORT(
	     ui_board_clk		: IN  STD_LOGIC; --输入时钟
	     ui_clk_mirror_fb	: IN  STD_LOGIC; --外部时钟的反馈信号				
	     clk2x_int				: OUT STD_LOGIC; --内部使用的2倍时钟
	     ui_clk_mirror_locked_int	: OUT STD_LOGIC; --内部使用时钟的锁定信号
	     clk2x_ext			  	: OUT STD_LOGIC; --2倍时钟输出
	     ui_clk_mirror_locked_ext	: OUT STD_LOGIC);--外部使用的2倍时钟
END DLL_2X_BOARD;

ARCHITECTURE RTL OF DLL_2X_BOARD IS
SIGNAL logic0			: STD_LOGIC;
SIGNAL clkin			: STD_LOGIC;
SIGNAL clk_mirror_fb_ext	: STD_LOGIC;;
SIGNAL clk2xdll_int		: STD_LOGIC;
SIGNAL clk2xdll_ext		: STD_LOGIC;
SIGNAL clk_mirror_locked_ext		: STD_LOGIC;
SIGNAL clk_mirror_locked_ext_inv	: STD_LOGIC;
SIGNAL clk_mirror_locked_int		: STD_LOGIC;
SIGNAL clk_mirror_locked_int_inv	: STD_LOGIC;
SIGNAL clk2x_inta				: STD_LOGIC;

COMPONENT IBUFG
	PORT(I : IN STD_LOGIC; O : OUT STD_LOGIC);
END COMPONENT;

COMPONENT CLKDLL
	PORT(clkin : IN STD_LOGIC;
	     clkfb : IN STD_LOGIC;
	     rst   : IN STD_LOGIC;
	     locked: OUT STD_LOGIC;
	     clk2x : OUT STD_LOGIC);
END COMPONENT;

COMPONENT BUFG
	PORT(I : IN STD_LOGIC; O : OUT STD_LOGIC);
END COMPONENT;

COMPONENT OBUF_F_16 
	PORT(I : IN STD_LOGIC; O : OUT STD_LOGIC);
END COMPONENT;

COMPONENT OBUF_F_8
	PORT(I : IN STD_LOGIC; O : OUT STD_LOGIC);
END COMPONENT;

BEGIN

logic0 <= '0'; -- Never reset the DLL

I_ibufg_clkin: IBUFG  PORT MAP(I=>ui_board_clk, O=>clkin);

I_clkdll_int : CLKDLL  PORT MAP(
clkin=>clkin, 
clkfb=>clk2x_inta, 
rst=>logic0, 
clk2x=>clk2xdll_int, 
locked=>clk_mirror_locked_int);

I_bufg_clk2x_int: BUFG  PORT MAP(I=>clk2xdll_int, O=>clk2x_inta);

clk2x_int <= clk2x_inta;

I_clkdll_ext : CLKDLL  PORT MAP(
clkin=>clkin, 
clkfb=>clk_mirror_fb_ext,
rst=>logic0, 
clk2x=>clk2xdll_ext,
locked=>clk_mirror_locked_ext);

clk_mirror_locked_int_inv <= not clk_mirror_locked_int;
I_obuf_clk_mirror_locked_int: OBUF_F_16  PORT MAP (
I=>clk_mirror_locked_int_inv, 
O=>ui_clk_mirror_locked_int);

I_obuf_clk2x_ext: OBUF_F_8  PORT MAP (I=>clk2xdll_ext, O=>clk2x_ext);

I_ibufg_clk_mirror_fb_ext: IBUFG  PORT MAP (I=>ui_clk_mirror_fb, O=>clk_mirror_fb_ext);

clk_mirror_locked_ext_inv <= not clk_mirror_locked_ext;

I_obuf_clk_mirror_locked_ext: OBUF_F_16  PORT MAP (
I=>clk_mirror_locked_ext_inv, 
O=>ui_clk_mirror_locked_ext);

END RTL;