prev_cmp_ctime.map.qmsg

用ＶＨＤＬ来模拟实现钟最终实现数字电子钟的设计

{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "b six.vhd(17) " "Warning (10492): VHDL Process Statement warning at six.vhd(17): signal \"b\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 17 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "b six.vhd(11) " "Warning (10631): VHDL Process Statement warning at six.vhd(11): inferring latch(es) for signal or variable \"b\", which holds its previous value in one or more paths through the process" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "cou six.vhd(11) " "Warning (10631): VHDL Process Statement warning at six.vhd(11): inferring latch(es) for signal or variable \"cou\", which holds its previous value in one or more paths through the process" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "cou six.vhd(11) " "Info (10041): Inferred latch for \"cou\" at six.vhd(11)" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 11 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "b\[0\] six.vhd(11) " "Info (10041): Inferred latch for \"b\[0\]\" at six.vhd(11)" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 11 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "b\[1\] six.vhd(11) " "Info (10041): Inferred latch for \"b\[1\]\" at six.vhd(11)" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 11 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "b\[2\] six.vhd(11) " "Info (10041): Inferred latch for \"b\[2\]\" at six.vhd(11)" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 11 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "b\[3\] six.vhd(11) " "Info (10041): Inferred latch for \"b\[3\]\" at six.vhd(11)" {  } { { "six.vhd" "" { Text "D:/EDA/030501713/time/six.vhd" 11 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "decoder.vhd 2 1 " "Warning: Using design file decoder.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 decoder-a " "Info: Found design unit 1: decoder-a" {  } { { "decoder.vhd" "" { Text "D:/EDA/030501713/time/decoder.vhd" 7 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 decoder " "Info: Found entity 1: decoder" {  } { { "decoder.vhd" "" { Text "D:/EDA/030501713/time/decoder.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decoder decoder:X0 " "Info: Elaborating entity \"decoder\" for hierarchy \"decoder:X0\"" {  } { { "ctime.vhd" "X0" { Text "D:/EDA/030501713/time/ctime.vhd" 45 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "ten:U0\|a\[0\]\$latch " "Warning: LATCH primitive \"ten:U0\|a\[0\]\$latch\" is permanently enabled" {  } { { "ten.vhd" "" { Text "D:/EDA/030501713/time/ten.vhd" 11 0 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "ten:U0\|a\[1\]\$latch " "Warning: LATCH primitive \"ten:U0\|a\[1\]\$latch\" is permanently enabled" {  } { { "ten.vhd" "" { Text "D:/EDA/030501713/time/ten.vhd" 11 0 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "ten:U0\|a\[2\]\$latch " "Warning: LATCH primitive \"ten:U0\|a\[2\]\$latch\" is permanently enabled" {  } { { "ten.vhd" "" { Text "D:/EDA/030501713/time/ten.vhd" 11 0 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "ten:U0\|a\[3\]\$latch " "Warning: LATCH primitive \"ten:U0\|a\[3\]\$latch\" is permanently enabled" {  } { { "ten.vhd" "" { Text "D:/EDA/030501713/time/ten.vhd" 11 0 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "a2\[0\] GND " "Warning (13410): Pin \"a2\[0\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a2\[1\] GND " "Warning (13410): Pin \"a2\[1\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a2\[2\] GND " "Warning (13410): Pin \"a2\[2\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a2\[3\] GND " "Warning (13410): Pin \"a2\[3\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a2\[4\] GND " "Warning (13410): Pin \"a2\[4\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a2\[5\] GND " "Warning (13410): Pin \"a2\[5\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a2\[6\] GND " "Warning (13410): Pin \"a2\[6\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a5\[0\] GND " "Warning (13410): Pin \"a5\[0\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a5\[1\] GND " "Warning (13410): Pin \"a5\[1\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a5\[2\] GND " "Warning (13410): Pin \"a5\[2\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a5\[3\] GND " "Warning (13410): Pin \"a5\[3\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a5\[4\] GND " "Warning (13410): Pin \"a5\[4\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a5\[5\] GND " "Warning (13410): Pin \"a5\[5\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "a5\[6\] GND " "Warning (13410): Pin \"a5\[6\]\" stuck at GND" {  } { { "ctime.vhd" "" { Text "D:/EDA/030501713/time/ctime.vhd" 6 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "168 " "Info: Implemented 168 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "1 " "Info: Implemented 1 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "56 " "Info: Implemented 56 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "111 " "Info: Implemented 111 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 30 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 30 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "152 " "Info: Allocated 152 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Apr 10 09:29:13 2008 " "Info: Processing ended: Thu Apr 10 09:29:13 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}