vga.fit.eqn

用来实现VGA发生时序

--operation mode is normal

B2_cnt[15]_lut_out = B2_cnt[15] & (B2L04 # B2L111 & B2L34) # !B2_cnt[15] & B2L111 & B2L34;
B2_cnt[15] = DFFEA(B2_cnt[15]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[15] is vga_vtim:hor_gen|cnt[15] at LC_X5_Y11_N5
--operation mode is normal

B1_cnt[15]_lut_out = B1L16 & (B1_cnt[15] # B1L611 & B1L34) # !B1L16 & B1L611 & B1L34;
B1_cnt[15] = DFFEA(B1_cnt[15]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[15] is vga_vtim:hor_gen|cnt_len[15] at LC_X4_Y9_N8
--operation mode is normal

B1_cnt_len[15]_lut_out = B1L16 & (B1_cnt_len[15] # B1L571 & B1L84) # !B1L16 & B1L571 & B1L84;
B1_cnt_len[15] = DFFEA(B1_cnt_len[15]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[15] is vga_vtim:ver_gen|cnt_len[15] at LC_X8_Y12_N8
--operation mode is normal

B2_cnt_len[15]_lut_out = B2L04 & (B2_cnt_len[15] # B2L071 & B2L74) # !B2L04 & B2L071 & B2L74;
B2_cnt_len[15] = DFFEA(B2_cnt_len[15]_lut_out, GLOBAL(clk), VCC, , , , );


--B2L14 is vga_vtim:ver_gen|i208~188 at LC_X7_Y12_N9
--operation mode is normal

B2L14 = B2L481Q & B2L471;


--B2L34 is vga_vtim:ver_gen|i209~194 at LC_X6_Y10_N1
--operation mode is normal

B2L34 = !rst & i4 & (B2L14 # B2L24);


--B2_cnt[14] is vga_vtim:ver_gen|cnt[14] at LC_X6_Y10_N5
--operation mode is normal

B2_cnt[14]_lut_out = B2L701 & (B2L34 # B2L04 & B2_cnt[14]) # !B2L701 & B2L04 & B2_cnt[14];
B2_cnt[14] = DFFEA(B2_cnt[14]_lut_out, GLOBAL(clk), VCC, , , , );


--B1L24 is vga_vtim:hor_gen|i208~100 at LC_X5_Y9_N9
--operation mode is normal

B1L24 = B1L981Q & !B1L971;


--B1L34 is vga_vtim:hor_gen|i209~106 at LC_X5_Y11_N1
--operation mode is normal

B1L34 = B1L64 & (B1L881Q # B1L24 # B1L14);


--B1L16 is vga_vtim:hor_gen|i242~8 at LC_X6_Y13_N2
--operation mode is normal

B1L16 = !clk_ena & !rst;


--B1_cnt[14] is vga_vtim:hor_gen|cnt[14] at LC_X5_Y11_N7
--operation mode is normal

B1_cnt[14]_lut_out = B1L211 & (B1L34 # B1L16 & B1_cnt[14]) # !B1L211 & B1L16 & B1_cnt[14];
B1_cnt[14] = DFFEA(B1_cnt[14]_lut_out, GLOBAL(clk), VCC, , , , );


--B1L84 is vga_vtim:hor_gen|i224~108 at LC_X4_Y9_N6
--operation mode is normal

B1L84 = B1L64 & (B1L881Q # B1L24 # !B1L181);


--B1_cnt_len[14] is vga_vtim:hor_gen|cnt_len[14] at LC_X4_Y9_N3
--operation mode is normal

B1_cnt_len[14]_lut_out = B1L16 & (B1_cnt_len[14] # B1L84 & B1L171) # !B1L16 & B1L84 & B1L171;
B1_cnt_len[14] = DFFEA(B1_cnt_len[14]_lut_out, GLOBAL(clk), VCC, , , , );


--B2L74 is vga_vtim:ver_gen|i224~132 at LC_X8_Y12_N7
--operation mode is normal

B2L74 = !rst & i4 & (B2L571 # B2L14);


--B2_cnt_len[14] is vga_vtim:ver_gen|cnt_len[14] at LC_X8_Y12_N2
--operation mode is normal

B2_cnt_len[14]_lut_out = B2_cnt_len[14] & (B2L04 # B2L661 & B2L74) # !B2_cnt_len[14] & B2L661 & B2L74;
B2_cnt_len[14] = DFFEA(B2_cnt_len[14]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[13] is vga_vtim:ver_gen|cnt[13] at LC_X6_Y10_N8
--operation mode is normal

B2_cnt[13]_lut_out = B2_cnt[13] & (B2L04 # B2L301 & B2L34) # !B2_cnt[13] & B2L301 & B2L34;
B2_cnt[13] = DFFEA(B2_cnt[13]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[13] is vga_vtim:hor_gen|cnt[13] at LC_X5_Y11_N6
--operation mode is normal

B1_cnt[13]_lut_out = B1_cnt[13] & (B1L16 # B1L801 & B1L34) # !B1_cnt[13] & B1L801 & B1L34;
B1_cnt[13] = DFFEA(B1_cnt[13]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[13] is vga_vtim:hor_gen|cnt_len[13] at LC_X4_Y9_N5
--operation mode is normal

B1_cnt_len[13]_lut_out = B1L16 & (B1_cnt_len[13] # B1L761 & B1L84) # !B1L16 & B1L761 & B1L84;
B1_cnt_len[13] = DFFEA(B1_cnt_len[13]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[13] is vga_vtim:ver_gen|cnt_len[13] at LC_X8_Y12_N3
--operation mode is normal

B2_cnt_len[13]_lut_out = B2L04 & (B2_cnt_len[13] # B2L74 & B2L261) # !B2L04 & B2L74 & B2L261;
B2_cnt_len[13] = DFFEA(B2_cnt_len[13]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[12] is vga_vtim:ver_gen|cnt[12] at LC_X6_Y10_N9
--operation mode is normal

B2_cnt[12]_lut_out = B2L101 & (B2L34 # B2L04 & B2_cnt[12]) # !B2L101 & B2L04 & B2_cnt[12];
B2_cnt[12] = DFFEA(B2_cnt[12]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[12] is vga_vtim:hor_gen|cnt[12] at LC_X5_Y11_N9
--operation mode is normal

B1_cnt[12]_lut_out = B1L16 & (B1_cnt[12] # B1L601 & B1L34) # !B1L16 & B1L601 & B1L34;
B1_cnt[12] = DFFEA(B1_cnt[12]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[12] is vga_vtim:hor_gen|cnt_len[12] at LC_X6_Y9_N4
--operation mode is normal

B1_cnt_len[12]_lut_out = B1L16 & (B1_cnt_len[12] # B1L561 & B1L84) # !B1L16 & B1L561 & B1L84;
B1_cnt_len[12] = DFFEA(B1_cnt_len[12]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[12] is vga_vtim:ver_gen|cnt_len[12] at LC_X8_Y12_N1
--operation mode is normal

B2_cnt_len[12]_lut_out = B2L04 & (B2_cnt_len[12] # B2L74 & B2L061) # !B2L04 & B2L74 & B2L061;
B2_cnt_len[12] = DFFEA(B2_cnt_len[12]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[11] is vga_vtim:ver_gen|cnt[11] at LC_X6_Y9_N2
--operation mode is normal

B2_cnt[11]_lut_out = B2_cnt[11] & (B2L04 # B2L79 & B2L34) # !B2_cnt[11] & B2L79 & B2L34;
B2_cnt[11] = DFFEA(B2_cnt[11]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[11] is vga_vtim:hor_gen|cnt[11] at LC_X5_Y11_N4
--operation mode is normal

B1_cnt[11]_lut_out = B1L16 & (B1_cnt[11] # B1L201 & B1L34) # !B1L16 & B1L201 & B1L34;
B1_cnt[11] = DFFEA(B1_cnt[11]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[11] is vga_vtim:hor_gen|cnt_len[11] at LC_X4_Y9_N7
--operation mode is normal

B1_cnt_len[11]_lut_out = B1_cnt_len[11] & (B1L16 # B1L161 & B1L84) # !B1_cnt_len[11] & B1L161 & B1L84;
B1_cnt_len[11] = DFFEA(B1_cnt_len[11]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[11] is vga_vtim:ver_gen|cnt_len[11] at LC_X8_Y12_N4
--operation mode is normal

B2_cnt_len[11]_lut_out = B2L04 & (B2_cnt_len[11] # B2L74 & B2L651) # !B2L04 & B2L74 & B2L651;
B2_cnt_len[11] = DFFEA(B2_cnt_len[11]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[10] is vga_vtim:ver_gen|cnt[10] at LC_X6_Y10_N7
--operation mode is normal

B2_cnt[10]_lut_out = B2_cnt[10] & (B2L04 # B2L39 & B2L34) # !B2_cnt[10] & B2L39 & B2L34;
B2_cnt[10] = DFFEA(B2_cnt[10]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[10] is vga_vtim:hor_gen|cnt[10] at LC_X4_Y11_N9
--operation mode is normal

B1_cnt[10]_lut_out = B1_cnt[10] & (B1L16 # B1L89 & B1L34) # !B1_cnt[10] & B1L89 & B1L34;
B1_cnt[10] = DFFEA(B1_cnt[10]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[10] is vga_vtim:hor_gen|cnt_len[10] at LC_X4_Y9_N9
--operation mode is normal

B1_cnt_len[10]_lut_out = B1_cnt_len[10] & (B1L16 # B1L751 & B1L84) # !B1_cnt_len[10] & B1L751 & B1L84;
B1_cnt_len[10] = DFFEA(B1_cnt_len[10]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[10] is vga_vtim:ver_gen|cnt_len[10] at LC_X8_Y12_N0
--operation mode is normal

B2_cnt_len[10]_lut_out = B2_cnt_len[10] & (B2L04 # B2L251 & B2L74) # !B2_cnt_len[10] & B2L251 & B2L74;
B2_cnt_len[10] = DFFEA(B2_cnt_len[10]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[9] is vga_vtim:ver_gen|cnt[9] at LC_X6_Y10_N2
--operation mode is normal

B2_cnt[9]_lut_out = B2L98 & (B2L34 # B2L04 & B2_cnt[9]) # !B2L98 & B2L04 & B2_cnt[9];
B2_cnt[9] = DFFEA(B2_cnt[9]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[9] is vga_vtim:hor_gen|cnt[9] at LC_X5_Y11_N8
--operation mode is normal

B1_cnt[9]_lut_out = B1L16 & (B1_cnt[9] # B1L49 & B1L34) # !B1L16 & B1L49 & B1L34;
B1_cnt[9] = DFFEA(B1_cnt[9]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[9] is vga_vtim:hor_gen|cnt_len[9] at LC_X4_Y9_N4
--operation mode is normal

B1_cnt_len[9]_lut_out = B1L351 & (B1L84 # B1L16 & B1_cnt_len[9]) # !B1L351 & B1L16 & B1_cnt_len[9];
B1_cnt_len[9] = DFFEA(B1_cnt_len[9]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[9] is vga_vtim:ver_gen|cnt_len[9] at LC_X8_Y12_N9
--operation mode is normal

B2_cnt_len[9]_lut_out = B2_cnt_len[9] & (B2L04 # B2L841 & B2L74) # !B2_cnt_len[9] & B2L841 & B2L74;
B2_cnt_len[9] = DFFEA(B2_cnt_len[9]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[8] is vga_vtim:ver_gen|cnt[8] at LC_X7_Y10_N9
--operation mode is normal

B2_cnt[8]_lut_out = B2_cnt[8] & (B2L04 # B2L58 & B2L34) # !B2_cnt[8] & B2L58 & B2L34;
B2_cnt[8] = DFFEA(B2_cnt[8]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[8] is vga_vtim:hor_gen|cnt[8] at LC_X5_Y11_N2
--operation mode is normal

B1_cnt[8]_lut_out = B1L16 & (B1_cnt[8] # B1L09 & B1L34) # !B1L16 & B1L09 & B1L34;
B1_cnt[8] = DFFEA(B1_cnt[8]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[8] is vga_vtim:hor_gen|cnt_len[8] at LC_X4_Y9_N2
--operation mode is normal

B1_cnt_len[8]_lut_out = B1L16 & (B1_cnt_len[8] # B1L941 & B1L84) # !B1L16 & B1L941 & B1L84;
B1_cnt_len[8] = DFFEA(B1_cnt_len[8]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[8] is vga_vtim:ver_gen|cnt_len[8] at LC_X8_Y12_N5
--operation mode is normal

B2_cnt_len[8]_lut_out = B2_cnt_len[8] & (B2L04 # B2L441 & B2L74) # !B2_cnt_len[8] & B2L441 & B2L74;
B2_cnt_len[8] = DFFEA(B2_cnt_len[8]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[7] is vga_vtim:ver_gen|cnt[7] at LC_X6_Y11_N5
--operation mode is normal

B2_cnt[7]_lut_out = B2_cnt[7] & (B2L04 # B2L38 & B2L34) # !B2_cnt[7] & B2L38 & B2L34;
B2_cnt[7] = DFFEA(B2_cnt[7]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[7] is vga_vtim:hor_gen|cnt[7] at LC_X5_Y11_N3
--operation mode is normal

B1_cnt[7]_lut_out = B1_cnt[7] & (B1L16 # B1L88 & B1L34) # !B1_cnt[7] & B1L88 & B1L34;
B1_cnt[7] = DFFEA(B1_cnt[7]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[7] is vga_vtim:hor_gen|cnt_len[7] at LC_X4_Y10_N7
--operation mode is normal

B1_cnt_len[7]_lut_out = B1_cnt_len[7] & (B1L16 # B1L741 & B1L84) # !B1_cnt_len[7] & B1L741 & B1L84;
B1_cnt_len[7] = DFFEA(B1_cnt_len[7]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[7] is vga_vtim:ver_gen|cnt_len[7] at LC_X8_Y13_N1
--operation mode is normal

B2_cnt_len[7]_lut_out = B2_cnt_len[7] & (B2L04 # B2L241 & B2L74) # !B2_cnt_len[7] & B2L241 & B2L74;
B2_cnt_len[7] = DFFEA(B2_cnt_len[7]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[6] is vga_vtim:ver_gen|cnt[6] at LC_X6_Y11_N9
--operation mode is normal

B2_cnt[6]_lut_out = B2L97 & (B2L34 # B2_cnt[6] & B2L04) # !B2L97 & B2_cnt[6] & B2L04;
B2_cnt[6] = DFFEA(B2_cnt[6]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[6] is vga_vtim:hor_gen|cnt[6] at LC_X5_Y12_N1
--operation mode is normal

B1_cnt[6]_lut_out = B1L16 & (B1_cnt[6] # B1L48 & B1L34) # !B1L16 & B1L48 & B1L34;
B1_cnt[6] = DFFEA(B1_cnt[6]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[6] is vga_vtim:hor_gen|cnt_len[6] at LC_X4_Y10_N9
--operation mode is normal

B1_cnt_len[6]_lut_out = B1L341 & (B1L84 # B1_cnt_len[6] & B1L16) # !B1L341 & B1_cnt_len[6] & B1L16;
B1_cnt_len[6] = DFFEA(B1_cnt_len[6]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[6] is vga_vtim:ver_gen|cnt_len[6] at LC_X8_Y13_N6
--operation mode is normal

B2_cnt_len[6]_lut_out = B2_cnt_len[6] & (B2L04 # B2L831 & B2L74) # !B2_cnt_len[6] & B2L831 & B2L74;
B2_cnt_len[6] = DFFEA(B2_cnt_len[6]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[5] is vga_vtim:ver_gen|cnt[5] at LC_X6_Y11_N2
--operation mode is normal

B2_cnt[5]_lut_out = B2_cnt[5] & (B2L04 # B2L57 & B2L34) # !B2_cnt[5] & B2L57 & B2L34;
B2_cnt[5] = DFFEA(B2_cnt[5]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[5] is vga_vtim:hor_gen|cnt[5] at LC_X4_Y12_N0
--operation mode is normal

B1_cnt[5]_lut_out = B1_cnt[5] & (B1L16 # B1L08 & B1L34) # !B1_cnt[5] & B1L08 & B1L34;
B1_cnt[5] = DFFEA(B1_cnt[5]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[5] is vga_vtim:hor_gen|cnt_len[5] at LC_X5_Y10_N0
--operation mode is normal

B1_cnt_len[5]_lut_out = B1L931 & (B1L84 # B1_cnt_len[5] & B1L16) # !B1L931 & B1_cnt_len[5] & B1L16;
B1_cnt_len[5] = DFFEA(B1_cnt_len[5]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[5] is vga_vtim:ver_gen|cnt_len[5] at LC_X8_Y13_N9
--operation mode is normal

B2_cnt_len[5]_lut_out = B2_cnt_len[5] & (B2L04 # B2L431 & B2L74) # !B2_cnt_len[5] & B2L431 & B2L74;
B2_cnt_len[5] = DFFEA(B2_cnt_len[5]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[4] is vga_vtim:ver_gen|cnt[4] at LC_X7_Y11_N0
--operation mode is normal

B2_cnt[4]_lut_out = B2L17 & (B2L34 # B2_cnt[4] & B2L04) # !B2L17 & B2_cnt[4] & B2L04;
B2_cnt[4] = DFFEA(B2_cnt[4]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[4] is vga_vtim:hor_gen|cnt[4] at LC_X5_Y12_N4
--operation mode is normal

B1_cnt[4]_lut_out = B1L16 & (B1_cnt[4] # B1L67 & B1L34) # !B1L16 & B1L67 & B1L34;
B1_cnt[4] = DFFEA(B1_cnt[4]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt_len[4] is vga_vtim:hor_gen|cnt_len[4] at LC_X4_Y10_N4
--operation mode is normal

B1_cnt_len[4]_lut_out = !rst & (B1L15 # B1L531 & B1L94);
B1_cnt_len[4] = DFFEA(B1_cnt_len[4]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt_len[4] is vga_vtim:ver_gen|cnt_len[4] at LC_X7_Y13_N1
--operation mode is normal

B2_cnt_len[4]_lut_out = B2L94 # B2_cnt_len[4] & B2L04 # !B2L05;
B2_cnt_len[4] = DFFEA(B2_cnt_len[4]_lut_out, GLOBAL(clk), VCC, , , , );


--B2_cnt[3] is vga_vtim:ver_gen|cnt[3] at LC_X8_Y11_N5
--operation mode is normal

B2_cnt[3]_lut_out = B2L64 # B2L54 # B2L04 & B2_cnt[3];
B2_cnt[3] = DFFEA(B2_cnt[3]_lut_out, GLOBAL(clk), VCC, , , , );


--B1_cnt[3] is vga_vtim:hor_gen|cnt[3] at LC_X5_Y13_N6
--operation mode is normal

B1_cnt[3]_lut_out = B1L54 # B1L74 # B1L16 & B1_cnt[3];
B1_cnt[3] = DFFEA(B1_cnt[3]_lut_out, GLOBAL(clk), VCC, , , , );


--B1L05 is vga_vtim:hor_gen|i235~195 at LC_X4_Y10_N2
--operation mode is normal

B1L05 = clk_ena & B1L981Q & (B1L531 # B1L971);


--B1L15 is vga_vtim:hor_gen|i235~196 at LC_X4_Y10_N3
--operation mode is normal

B1L15 = B1L05 # clk_ena & !B1L581Q # !clk_ena & B1_cnt_len[4];


--B1_cnt_len[3] is vga_vtim:hor_gen|cnt_len[3] at LC_X5_Y10_N1
--operation mode is normal

B1_cnt_len[3]_lut_out = !rst & (B1L35 # B1L131 & B1L94);
B1_cnt_len[3] = DFFEA(B1_cnt_len[3]_lut_out, GLOBAL(clk), VCC, , , , );


--B2L94 is vga_vtim:ver_gen|i235~189 at LC_X8_Y13_N8
--operation mode is normal

B2L94 = B2L84 & B2L031 & (B2L481Q # B2L571);


--B2L05 is vga_vtim:ver_gen|i235~190 at LC_X8_Y13_N3
--operation mode is normal

B2L05 = B2L081Q & (B2L471 # !B2L481Q) # !B2L84;


--B2_cnt_len[3] is vga_vtim:ver_gen|cnt_len[3] at LC_X8_Y13_N5
--operation mode is normal

B2_cnt_len[3]_lut_out = B2_cnt_len[3] & (B2L04 # B2L621 & B2L74) # !B2_cnt_len[3] & B2L621 & B2L74;
B2_cnt_len[3] = DFFEA(B2_cnt_len[3]_lut_out, GLOBAL(clk), VCC, , , , );


--B2L64 is vga_vtim:ver_gen