vga.fit.eqn

用来实现VGA发生时序

E1L17_cout_1 = !E1L86 # !E1_safe_q[11];
E1L17 = CARRY(E1L17_cout_1);


--E1_safe_q[10] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[10] at LC_X20_Y12_N1
--operation mode is arithmetic

E1_safe_q[10]_carry_eqn = (!E1L91 & E1L46) # (E1L91 & E1L56);
E1_safe_q[10]_lut_out = E1_safe_q[10] $ (B1L2Q & !E1_safe_q[10]_carry_eqn);
E1_safe_q[10]_reg_input = !C1L1 & E1_safe_q[10]_lut_out;
E1_safe_q[10] = DFFEA(E1_safe_q[10]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L76 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[10]~COUT0 at LC_X20_Y12_N1
--operation mode is arithmetic

E1L76_cout_0 = E1_safe_q[10] & !E1L46;
E1L76 = CARRY(E1L76_cout_0);

--E1L86 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[10]~COUT1 at LC_X20_Y12_N1
--operation mode is arithmetic

E1L86_cout_1 = E1_safe_q[10] & !E1L56;
E1L86 = CARRY(E1L86_cout_1);


--E1_safe_q[9] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[9] at LC_X20_Y12_N0
--operation mode is arithmetic

E1_safe_q[9]_carry_eqn = E1L91;
E1_safe_q[9]_lut_out = E1_safe_q[9] $ (B1L2Q & E1_safe_q[9]_carry_eqn);
E1_safe_q[9]_reg_input = !C1L1 & E1_safe_q[9]_lut_out;
E1_safe_q[9] = DFFEA(E1_safe_q[9]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L46 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[9]~COUT0 at LC_X20_Y12_N0
--operation mode is arithmetic

E1L46_cout_0 = !E1L91 # !E1_safe_q[9];
E1L46 = CARRY(E1L46_cout_0);

--E1L56 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[9]~COUT1 at LC_X20_Y12_N0
--operation mode is arithmetic

E1L56_cout_1 = !E1L91 # !E1_safe_q[9];
E1L56 = CARRY(E1L56_cout_1);


--E1_safe_q[8] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[8] at LC_X20_Y13_N9
--operation mode is arithmetic

E1_safe_q[8]_carry_eqn = (!E1L9 & E1L06) # (E1L9 & E1L16);
E1_safe_q[8]_lut_out = E1_safe_q[8] $ (B1L2Q & !E1_safe_q[8]_carry_eqn);
E1_safe_q[8]_reg_input = !C1L1 & E1_safe_q[8]_lut_out;
E1_safe_q[8] = DFFEA(E1_safe_q[8]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L91 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|counter_cell[8]~COUT at LC_X20_Y13_N9
--operation mode is arithmetic

E1L91 = CARRY(E1_safe_q[8] & !E1L16);


--E1_safe_q[7] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7] at LC_X20_Y13_N8
--operation mode is arithmetic

E1_safe_q[7]_carry_eqn = (!E1L9 & E1L75) # (E1L9 & E1L85);
E1_safe_q[7]_lut_out = E1_safe_q[7] $ (B1L2Q & E1_safe_q[7]_carry_eqn);
E1_safe_q[7]_reg_input = !C1L1 & E1_safe_q[7]_lut_out;
E1_safe_q[7] = DFFEA(E1_safe_q[7]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L06 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7]~COUT0 at LC_X20_Y13_N8
--operation mode is arithmetic

E1L06_cout_0 = !E1L75 # !E1_safe_q[7];
E1L06 = CARRY(E1L06_cout_0);

--E1L16 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[7]~COUT1 at LC_X20_Y13_N8
--operation mode is arithmetic

E1L16_cout_1 = !E1L85 # !E1_safe_q[7];
E1L16 = CARRY(E1L16_cout_1);


--E1_safe_q[6] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6] at LC_X20_Y13_N7
--operation mode is arithmetic

E1_safe_q[6]_carry_eqn = (!E1L9 & E1L45) # (E1L9 & E1L55);
E1_safe_q[6]_lut_out = E1_safe_q[6] $ (B1L2Q & !E1_safe_q[6]_carry_eqn);
E1_safe_q[6]_reg_input = !C1L1 & E1_safe_q[6]_lut_out;
E1_safe_q[6] = DFFEA(E1_safe_q[6]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L75 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6]~COUT0 at LC_X20_Y13_N7
--operation mode is arithmetic

E1L75_cout_0 = E1_safe_q[6] & !E1L45;
E1L75 = CARRY(E1L75_cout_0);

--E1L85 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[6]~COUT1 at LC_X20_Y13_N7
--operation mode is arithmetic

E1L85_cout_1 = E1_safe_q[6] & !E1L55;
E1L85 = CARRY(E1L85_cout_1);


--E1_safe_q[5] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5] at LC_X20_Y13_N6
--operation mode is arithmetic

E1_safe_q[5]_carry_eqn = (!E1L9 & E1L15) # (E1L9 & E1L25);
E1_safe_q[5]_lut_out = E1_safe_q[5] $ (B1L2Q & E1_safe_q[5]_carry_eqn);
E1_safe_q[5]_reg_input = !C1L1 & E1_safe_q[5]_lut_out;
E1_safe_q[5] = DFFEA(E1_safe_q[5]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L45 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5]~COUT0 at LC_X20_Y13_N6
--operation mode is arithmetic

E1L45_cout_0 = !E1L15 # !E1_safe_q[5];
E1L45 = CARRY(E1L45_cout_0);

--E1L55 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5]~COUT1 at LC_X20_Y13_N6
--operation mode is arithmetic

E1L55_cout_1 = !E1L25 # !E1_safe_q[5];
E1L55 = CARRY(E1L55_cout_1);


--E1_safe_q[4] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] at LC_X20_Y13_N5
--operation mode is arithmetic

E1_safe_q[4]_carry_eqn = E1L9;
E1_safe_q[4]_lut_out = E1_safe_q[4] $ (B1L2Q & !E1_safe_q[4]_carry_eqn);
E1_safe_q[4]_reg_input = !C1L1 & E1_safe_q[4]_lut_out;
E1_safe_q[4] = DFFEA(E1_safe_q[4]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L15 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4]~COUT0 at LC_X20_Y13_N5
--operation mode is arithmetic

E1L15_cout_0 = E1_safe_q[4] & !E1L9;
E1L15 = CARRY(E1L15_cout_0);

--E1L25 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4]~COUT1 at LC_X20_Y13_N5
--operation mode is arithmetic

E1L25_cout_1 = E1_safe_q[4] & !E1L9;
E1L25 = CARRY(E1L25_cout_1);


--E1_safe_q[3] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] at LC_X20_Y13_N4
--operation mode is arithmetic

E1_safe_q[3]_lut_out = E1_safe_q[3] $ (B1L2Q & E1L74);
E1_safe_q[3]_reg_input = !C1L1 & E1_safe_q[3]_lut_out;
E1_safe_q[3] = DFFEA(E1_safe_q[3]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L9 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|counter_cell[3]~COUT at LC_X20_Y13_N4
--operation mode is arithmetic

E1L9 = CARRY(!E1L84 # !E1_safe_q[3]);


--E1_safe_q[2] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] at LC_X20_Y13_N3
--operation mode is arithmetic

E1_safe_q[2]_lut_out = E1_safe_q[2] $ (B1L2Q & !E1L44);
E1_safe_q[2]_reg_input = !C1L1 & E1_safe_q[2]_lut_out;
E1_safe_q[2] = DFFEA(E1_safe_q[2]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L74 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2]~COUT0 at LC_X20_Y13_N3
--operation mode is arithmetic

E1L74_cout_0 = E1_safe_q[2] & !E1L44;
E1L74 = CARRY(E1L74_cout_0);

--E1L84 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2]~COUT1 at LC_X20_Y13_N3
--operation mode is arithmetic

E1L84_cout_1 = E1_safe_q[2] & !E1L54;
E1L84 = CARRY(E1L84_cout_1);


--E1_safe_q[1] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] at LC_X20_Y13_N2
--operation mode is arithmetic

E1_safe_q[1]_lut_out = E1_safe_q[1] $ (B1L2Q & E1L14);
E1_safe_q[1]_reg_input = !C1L1 & E1_safe_q[1]_lut_out;
E1_safe_q[1] = DFFEA(E1_safe_q[1]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L44 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1]~COUT0 at LC_X20_Y13_N2
--operation mode is arithmetic

E1L44_cout_0 = !E1L14 # !E1_safe_q[1];
E1L44 = CARRY(E1L44_cout_0);

--E1L54 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1]~COUT1 at LC_X20_Y13_N2
--operation mode is arithmetic

E1L54_cout_1 = !E1L24 # !E1_safe_q[1];
E1L54 = CARRY(E1L54_cout_1);


--E1_safe_q[0] is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] at LC_X20_Y13_N1
--operation mode is arithmetic

E1_safe_q[0]_lut_out = E1_safe_q[0] $ B1L2Q;
E1_safe_q[0]_reg_input = !C1L1 & E1_safe_q[0]_lut_out;
E1_safe_q[0] = DFFEA(E1_safe_q[0]_reg_input, GLOBAL(clk), VCC, , , , );

--E1L14 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0]~COUT0 at LC_X20_Y13_N1
--operation mode is arithmetic

E1L14_cout_0 = E1_safe_q[0];
E1L14 = CARRY(E1L14_cout_0);

--E1L24 is vga_vaddr:vramaddr_gen|lpm_counter:vaddr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0]~COUT1 at LC_X20_Y13_N1
--operation mode is arithmetic

E1L24_cout_1 = E1_safe_q[0];
E1L24 = CARRY(E1L24_cout_1);


--B2L1Q is vga_vtim:ver_gen|Gate~reg0 at LC_X8_Y10_N8
--operation mode is normal

B2L1Q_lut_out = B2L54 # !C1L1 & (!B2L55 # !B2L65);
B2L1Q = DFFEA(B2L1Q_lut_out, GLOBAL(clk), VCC, , , , );


--B1L2Q is vga_vtim:hor_gen|Gate~reg0 at LC_X5_Y13_N2
--operation mode is normal

B1L2Q_lut_out = B1L54 # B1L2Q & !rst & B1L95;
B1L2Q = DFFEA(B1L2Q_lut_out, GLOBAL(clk), VCC, , , , );


--i6 is i6 at LC_X10_Y13_N2
--operation mode is normal

i6 = B2L1Q & B1L2Q;


--B1L3Q is vga_vtim:hor_gen|Sync~reg0 at LC_X4_Y13_N8
--operation mode is normal

B1L3Q_lut_out = B1L65 # !rst & B1L3Q & B1L85;
B1L3Q = DFFEA(B1L3Q_lut_out, GLOBAL(clk), VCC, , , , );


--B2L2Q is vga_vtim:ver_gen|Sync~reg0 at LC_X8_Y11_N1
--operation mode is normal

B2L2Q_lut_out = B2L45 # !rst & i4 & !B2L771;
B2L2Q = DFFEA(B2L2Q_lut_out, GLOBAL(clk), VCC, , , , );


--C1L1 is vga_vaddr:vramaddr_gen|i43~9 at LC_X8_Y10_N9
--operation mode is normal

C1L1 = rst # !B2L1Q;


--B1L1Q is vga_vtim:hor_gen|Done~reg0 at LC_X5_Y12_N9
--operation mode is normal

B1L1Q_lut_out = !rst & (clk_ena & B1L281 # !clk_ena & B1L1Q);
B1L1Q = DFFEA(B1L1Q_lut_out, GLOBAL(clk), VCC, , , , );


--i4 is i4 at LC_X6_Y12_N0
--operation mode is normal

i4 = clk_ena & B1L1Q;


--B2L481Q is vga_vtim:ver_gen|state~14 at LC_X8_Y10_N1
--operation mode is normal

B2L481Q_lut_out = B2L83 # B2L44 & B2L381Q;
B2L481Q = DFFEA(B2L481Q_lut_out, GLOBAL(clk), VCC, , , , );


--B2L281Q is vga_vtim:ver_gen|state~12 at LC_X8_Y10_N3
--operation mode is normal

B2L281Q_lut_out = B2L44 & (B2L181Q # B2L281Q & B2L93) # !B2L44 & B2L281Q & B2L93;
B2L281Q = DFFEA(B2L281Q_lut_out, GLOBAL(clk), VCC, , , , );


--B2L54 is vga_vtim:ver_gen|i220~192 at LC_X8_Y10_N7
--operation mode is normal

B2L54 = B2L281Q & B2L44;


--B2L381Q is vga_vtim:ver_gen|state~13 at LC_X8_Y10_N4
--operation mode is normal

B2L381Q_lut_out = B2L281Q & (B2L44 # B2L381Q & B2L93) # !B2L281Q & B2L381Q & B2L93;
B2L381Q = DFFEA(B2L381Q_lut_out, GLOBAL(clk), VCC, , , , );


--B2L181Q is vga_vtim:ver_gen|state~11 at LC_X8_Y11_N2
--operation mode is normal

B2L181Q_lut_out = B2L181Q & (B2L93 # B2L84 & !B2L771) # !B2L181Q & B2L84 & !B2L771;
B2L181Q = DFFEA(B2L181Q_lut_out, GLOBAL(clk), VCC, , , , );


--B2L671 is vga_vtim:ver_gen|i~622 at LC_X6_Y11_N8
--operation mode is normal

B2L671 = !B2L181Q & !B2L281Q;


--B2L081Q is vga_vtim:ver_gen|state~10 at LC_X6_Y12_N1
--operation mode is normal

B2L081Q_lut_out = !rst & (B2L081Q # i4 & !B2L73);
B2L081Q = DFFEA(B2L081Q_lut_out, GLOBAL(clk), VCC, , , , );


--B2L55 is vga_vtim:ver_gen|i241~187 at LC_X6_Y10_N3
--operation mode is normal

B2L55 = B2L081Q & B2L671 & (!B2L511 # !B2L381Q);


--B1L781Q is vga_vtim:hor_gen|state~12 at LC_X5_Y13_N8
--operation mode is normal

B1L781Q_lut_out = B1L781Q & (B1L04 # B1L681Q & B1L44) # !B1L781Q & B1L681Q & B1L44;
B1L781Q = DFFEA(B1L781Q_lut_out, GLOBAL(clk), VCC, , , , );


--B1L64 is vga_vtim:hor_gen|i220~112 at LC_X6_Y11_N4
--operation mode is normal

B1L64 = clk_ena & !rst;


--B1L981Q is vga_vtim:hor_gen|state~14 at LC_X5_Y13_N9
--operation mode is normal

B1L981Q_lut_out = B1L93 # B1L881Q & B1L44;
B1L981Q = DFFEA(B1L981Q_lut_out, GLOBAL(clk), VCC, , , , );


--B1L881Q is vga_vtim:hor_gen|state~13 at LC_X4_Y13_N6
--operation mode is normal

B1L881Q_lut_out = B1L54 # B1L881Q & B1L04;
B1L881Q = DFFEA(B1L881Q_lut_out, GLOBAL(clk), VCC, , , , );


--B1L06 is vga_vtim:hor_gen|i241~119 at LC_X5_Y13_N0
--operation mode is normal

B1L06 = B1L981Q # B1L881Q & B1L021 # !clk_ena;


--B1L581Q is vga_vtim:hor_gen|state~10 at LC_X5_Y12_N6
--operation mode is normal

B1L581Q_lut_out = !rst & (B1L581Q # clk_ena & !B1L83);
B1L581Q = DFFEA(B1L581Q_lut_out, GLOBAL(clk), VCC, , , , );


--B1L681Q is vga_vtim:hor_gen|state~11 at LC_X4_Y13_N0
--operation mode is normal

B1L681Q_lut_out = B1L65 # B1L681Q & B1L04;
B1L681Q = DFFEA(B1L681Q_lut_out, GLOBAL(clk), VCC, , , , );


--B1L181 is vga_vtim:hor_gen|i~591 at LC_X5_Y12_N2
--operation mode is normal

B1L181 = !B1L681Q & !B1L781Q;


--B1L281 is vga_vtim:hor_gen|i~592 at LC_X5_Y12_N8
--operation mode is normal

B1L281 = B1L981Q & B1L971;


--B1L75 is vga_vtim:hor_gen|i240~140 at LC_X5_Y13_N3
--operation mode is normal

B1L75 = !B1L881Q & !B1L781Q & (!B1L021 # !B1L681Q);


--B1L85 is vga_vtim:hor_gen|i240~141 at LC_X4_Y13_N7
--operation mode is normal

B1L85 = B1L981Q # !B1L75 # !clk_ena;


--B2L35 is vga_vtim:ver_gen|i240~221 at LC_X8_Y11_N3
--operation mode is normal

B2L35 = !B2L281Q & !B2L381Q & (!B2L511 # !B2L181Q);


--B2L45 is vga_vtim:ver_gen|i240~222 at LC_X8_Y11_N0
--operation mode is normal

B2L45 = !rst & B2L2Q & (!B2L35 # !B2L65);


--B2L771 is vga_vtim:ver_gen|i~623 at LC_X8_Y11_N6
--operation mode is normal

B2L771 = B2L081Q & (B2L471 # !B2L481Q);


--B2L83 is vga_vtim:ver_gen|i203~118 at LC_X8_Y10_N0
--operation mode is normal

B2L83 = B2L481Q & !rst & (B2L471 # !i4);


--B1L04 is vga_vtim:hor_gen|i206~93 at LC_X4_Y13_N1
--operation mode is normal

B1L04 = !rst & (B1L021 # !clk_ena);


--B1L93 is vga_vtim:hor_gen|i203~70 at LC_X5_Y12_N0
--operation mode is normal

B1L93 = B1L981Q & !rst & (!B1L971 # !clk_ena);


--B2_cnt[15] is vga_vtim:ver_gen|cnt[15] at LC_X6_Y10_N6