top.tan.qmsg

基于FPGA的多波形发生器（编程环境QuartusII6.0）

{ "Info" "ITAN_SCC_LOOP" "2 " "Info: Found combinational loop of 2 nodes" { { "Info" "ITAN_SCC_NODE" "MUX41A:inst3\|DATAOUT\[5\]~840 " "Info: Node MUX41A:inst3\|DATAOUT\[5\]~840" {  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "MUX41A:inst3\|DATAOUT\[5\]~826 " "Info: Node MUX41A:inst3\|DATAOUT\[5\]~826" {  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0}  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } } { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "2 " "Info: Found combinational loop of 2 nodes" { { "Info" "ITAN_SCC_NODE" "MUX41A:inst3\|DATAOUT\[6\]~839 " "Info: Node MUX41A:inst3\|DATAOUT\[6\]~839" {  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "MUX41A:inst3\|DATAOUT\[6\]~824 " "Info: Node MUX41A:inst3\|DATAOUT\[6\]~824" {  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0}  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } } { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "2 " "Info: Found combinational loop of 2 nodes" { { "Info" "ITAN_SCC_NODE" "MUX41A:inst3\|DATAOUT\[7\]~838 " "Info: Node MUX41A:inst3\|DATAOUT\[7\]~838" {  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "MUX41A:inst3\|DATAOUT\[7\]~822 " "Info: Node MUX41A:inst3\|DATAOUT\[7\]~822" {  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0}  } { { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } } { "D:/EDA/multi-wave creator/MUX41A.vhd" "" "" { Text "D:/EDA/multi-wave creator/MUX41A.vhd" 7 -1 0 } }  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "altera_internal_jtag~TCKUTAP " "Info: Assuming node altera_internal_jtag~TCKUTAP is an undefined clock" {  } { { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TCKUTAP" } } } }  } 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "clk2 " "Info: Assuming node clk2 is an undefined clock" {  } { { "D:/EDA/multi-wave creator/top.bdf" "" "" { Schematic "D:/EDA/multi-wave creator/top.bdf" { { -32 848 1016 -16 "clk2" "" } } } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "clk2" } } } }  } 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node clk is an undefined clock" {  } { { "D:/EDA/multi-wave creator/top.bdf" "" "" { Schematic "D:/EDA/multi-wave creator/top.bdf" { { 264 -120 48 280 "clk" "" } } } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0}  } {  } 0}