top.map.qmsg

基于FPGA的多波形发生器（编程环境QuartusII6.0）

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd 3 1 " "Info: Found 3 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_mod_ram_rom_pack " "Info: Found design unit 1: sld_mod_ram_rom_pack" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "sld_mod_ram_rom_pack" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 4 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_mod_ram_rom-rtl " "Info: Found design unit 2: sld_mod_ram_rom-rtl" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "sld_mod_ram_rom-rtl" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 72 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_mod_ram_rom " "Info: Found entity 1: sld_mod_ram_rom" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "sld_mod_ram_rom" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 16 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_rom_sr-INFO_REG " "Info: Found design unit 1: sld_rom_sr-INFO_REG" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" "sld_rom_sr-INFO_REG" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" 27 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_rom_sr " "Info: Found entity 1: sld_rom_sr" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" "sld_rom_sr" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_rom_sr.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_mls.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_mls.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_mls " "Info: Found entity 1: altsyncram_mls" {  } { { "D:/EDA/multi-wave creator/db/altsyncram_mls.tdf" "altsyncram_mls" "" { Text "D:/EDA/multi-wave creator/db/altsyncram_mls.tdf" 33 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_bca2.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_bca2.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_bca2 " "Info: Found entity 1: altsyncram_bca2" {  } { { "D:/EDA/multi-wave creator/db/altsyncram_bca2.tdf" "altsyncram_bca2" "" { Text "D:/EDA/multi-wave creator/db/altsyncram_bca2.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_5fs.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_5fs.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_5fs " "Info: Found entity 1: altsyncram_5fs" {  } { { "D:/EDA/multi-wave creator/db/altsyncram_5fs.tdf" "altsyncram_5fs" "" { Text "D:/EDA/multi-wave creator/db/altsyncram_5fs.tdf" 33 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_p5a2.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_p5a2.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_p5a2 " "Info: Found entity 1: altsyncram_p5a2" {  } { { "D:/EDA/multi-wave creator/db/altsyncram_p5a2.tdf" "altsyncram_p5a2" "" { Text "D:/EDA/multi-wave creator/db/altsyncram_p5a2.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd 6 2 " "Info: Found 6 design units, including 2 entities, in source file c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 HUB_PACK " "Info: Found design unit 1: HUB_PACK" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "HUB_PACK" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 49 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 JTAG_PACK " "Info: Found design unit 2: JTAG_PACK" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "JTAG_PACK" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 63 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 sld_hub-rtl " "Info: Found design unit 3: sld_hub-rtl" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_hub-rtl" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 166 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 sld_jtag_state_machine-rtl " "Info: Found design unit 4: sld_jtag_state_machine-rtl" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_jtag_state_machine-rtl" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 1012 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_hub " "Info: Found entity 1: sld_hub" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_hub" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 99 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_jtag_state_machine " "Info: Found entity 2: sld_jtag_state_machine" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_jtag_state_machine" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 997 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_shiftreg " "Info: Found entity 1: lpm_shiftreg" {  } { { "c:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" "lpm_shiftreg" "" { Text "c:/altera/quartus41/libraries/megafunctions/lpm_shiftreg.tdf" 43 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_decode " "Info: Found entity 1: lpm_decode" {  } { { "c:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf" "lpm_decode" "" { Text "c:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf" 67 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_9ie.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/decode_9ie.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_9ie " "Info: Found entity 1: decode_9ie" {  } { { "D:/EDA/multi-wave creator/db/decode_9ie.tdf" "decode_9ie" "" { Text "D:/EDA/multi-wave creator/db/decode_9ie.tdf" 28 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_dffex-DFFEX " "Info: Found design unit 1: sld_dffex-DFFEX" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "sld_dffex-DFFEX" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 11 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_dffex " "Info: Found entity 1: sld_dffex" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "sld_dffex" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_IGNORED_SUMMARY" "8 " "Info: Ignored 8 buffer(s)" { { "Info" "IOPT_MLS_IGNORED_SOFT" "8 " "Info: Ignored 8 SOFT buffer(s)" {  } {  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "3 " "Info: Inferred 3 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "JCCRT:inst2\|Q1\[0\]~0 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: JCCRT:inst2\|Q1\[0\]~0" {  } { { "D:/EDA/multi-wave creator/JCCRT.vhd" "" "Q1\[0\]~0" { Text "D:/EDA/multi-wave creator/JCCRT.vhd" 18 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "SJCRT:inst1\|Q1\[0\]~0 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: SJCRT:inst1\|Q1\[0\]~0" {  } { { "D:/EDA/multi-wave creator/SJCRT.vhd" "" "Q1\[0\]~0" { Text "D:/EDA/multi-wave creator/SJCRT.vhd" 18 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "SINCRT:inst\|Q1\[0\]~0 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: SINCRT:inst\|Q1\[0\]~0" {  } { { "D:/EDA/multi-wave creator/SINCRT.vhd" "" "Q1\[0\]~0" { Text "D:/EDA/multi-wave creator/SINCRT.vhd" 18 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Info: Inferred 2 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "SINCRT:inst\|data_rom1:u1\|altsyncram:altsyncram_component\|altsyncram_q8s:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~240 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: SINCRT:inst\|data_rom1:u1\|altsyncram:altsyncram_component\|altsyncram_q8s:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~240" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_addr_reg\[0\]~240" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 394 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "SINCRT:inst\|data_rom1:u1\|altsyncram:altsyncram_component\|altsyncram_q8s:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: SINCRT:inst\|data_rom1:u1\|altsyncram:altsyncram_component\|altsyncram_q8s:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_data_shift_cntr_reg\[0\]~8" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 537 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Info: Inferred 2 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "SJCRT:inst1\|data_rom2:u1\|altsyncram:altsyncram_component\|altsyncram_mls:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~240 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: SJCRT:inst1\|data_rom2:u1\|altsyncram:altsyncram_component\|altsyncram_mls:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~240" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_addr_reg\[0\]~240" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 394 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "SJCRT:inst1\|data_rom2:u1\|altsyncram:altsyncram_component\|altsyncram_mls:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: SJCRT:inst1\|data_rom2:u1\|altsyncram:altsyncram_component\|altsyncram_mls:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_data_shift_cntr_reg\[0\]~8" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 537 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Info: Inferred 2 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "JCCRT:inst2\|data_rom3:u1\|altsyncram:altsyncram_component\|altsyncram_5fs:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~240 6 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: JCCRT:inst2\|data_rom3:u1\|altsyncram:altsyncram_component\|altsyncram_5fs:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~240" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_addr_reg\[0\]~240" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 394 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "JCCRT:inst2\|data_rom3:u1\|altsyncram:altsyncram_component\|altsyncram_5fs:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: JCCRT:inst2\|data_rom3:u1\|altsyncram:altsyncram_component\|altsyncram_5fs:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_data_shift_cntr_reg\[0\]~8" { Text "c:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 537 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf" "lpm_counter" "" { Text "c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_es6.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_es6.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_es6 " "Info: Found entity 1: cntr_es6" {  } { { "D:/EDA/multi-wave creator/db/cntr_es6.tdf" "cntr_es6" "" { Text "D:/EDA/multi-wave creator/db/cntr_es6.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_t98.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_t98.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_t98 " "Info: Found entity 1: cntr_t98" {  } { { "D:/EDA/multi-wave creator/db/cntr_t98.tdf" "cntr_t98" "" { Text "D:/EDA/multi-wave creator/db/cntr_t98.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_pd8.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_pd8.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_pd8 " "Info: Found entity 1: cntr_pd8" {  } { { "D:/EDA/multi-wave creator/db/cntr_pd8.tdf" "cntr_pd8" "" { Text "D:/EDA/multi-wave creator/db/cntr_pd8.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR_HDR" "" "Warning: Converted TRI buffer to OR gate or removed OPNDRN" { { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|45 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|45 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 624 344 392 656 "45" "" } } } }  } 0} { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|47 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|47 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 832 344 392 864 "47" "" } } } }  } 0} { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|44 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|44 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 520 344 392 552 "44" "" } } } }  } 0} { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|46 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|46 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 728 344 392 760 "46" "" } } } }  } 0} { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|41 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|41 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 208 344 392 240 "41" "" } } } }  } 0} { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|43 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|43 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 416 344 392 448 "43" "" } } } }  } 0} { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|40 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|40 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 104 344 392 136 "40" "" } } } }  } 0} { "Warning" "WOPT_MLS_CONVERT_TRI_TO_OR" "tf_top:inst4\|74374:inst4\|42 " "Warning: Converting TRI node tf_top:inst4\|74374:inst4\|42 that feeds logic to an OR gate" {  } { { "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" "" "" { Schematic "c:/altera/quartus41/libraries/others/maxplus2/74374.bdf" { { 312 344 392 344 "42" "" } } } }  } 0}  } {  } 0}
{ "Info" "IFTM_FTM_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "487 " "Info: Implemented 487 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "7 " "Info: Implemented 7 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "23 " "Info: Implemented 23 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "432 " "Info: Implemented 432 logic cells" {  } {  } 0} { "Info" "ISCL_SCL_TM_RAMS" "24 " "Info: Implemented 24 RAM segments" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 11 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Jun 19 17:25:28 2007 " "Info: Processing ended: Tue Jun 19 17:25:28 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:11 " "Info: Elapsed time: 00:00:11" {  } {  } 0}  } {  } 0}