i2c_1.txt

SAA7114 和 FPGA/CPLD之间通讯的程序

LIBRARY IEEE ;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE ieee.std_logic_arith.all;
USE WORK.ROM.ALL;
ENTITY I2C IS
   PORT (                          
                CLK           :IN   STD_LOGIC;   -- 功能模块时钟         
                RST           :IN   STD_LOGIC;   -- I2C复位
                SDA_IN        :IN   STD_LOGIC;   -- 主输入值
                CHIP_RST      :OUT  STD_LOGIC;   -- 输出复位信号
                SCL           :OUT  STD_LOGIC;   -- 主时钟
                ENA_SDA_OUT   :OUT  STD_LOGIC;   -- 主输出使能
                SDA_OUT       :OUT  STD_LOGIC);  -- 主输出值
                
   END I2C;

ARCHITECTURE RTL OF I2C IS
TYPE STATE_TYPE IS (I2C_START,I2C_START_SDA_RST,I2C_START_SCL_RST,I2C_SLAVE_W,I2C_SUBADD,
                    I2C_SUBADD_DATA,I2C_STOP,I2C_STOP_SCL_ST,I2C_NEXT_REG,I2C_END,RESET_CHIP,
                    STATE_END,I2C_R,I2C_R_R,I2C_R_DATA);
TYPE SLAVE_W_STATE_TYPE IS ( SLAVE_W_7,SLAVE_W_SCL_ST,SLAVE_W_SCL_RST,SLAVE_W_SDA_RST,
                             SLAVE_W_ACK,SLAVE_W_ACK_SCL_ST,SLAVE_W_ACK_H,SLAVE_W_ACK_SDA_O);
TYPE SUBADD_W_STATE_TYPE IS ( SUBADD_W_7,SUBADD_W_SCL_ST,SUBADD_W_SCL_RST,SUBADD_W_SDA_RST,
                              SUBADD_W_ACK,SUBADD_W_ACK_SCL_ST,SUBADD_W_ACK_H,SUBADD_W_ACK_SDA_O);
TYPE SLAVE_R_STATE_TYPE IS (SLAVE_R_SCL_ST,SLAVE_R_SDA,SLAVE_R_SCL_RST,SLAVE_R_END,SLAVE_R_END_ACKM,
                            SLAVE_R_END_ACKM_SCL_ST,SLAVE_R_END_ACKM_SDA_RST,SLAVE_R_END_ACKM_SCL_RST);

SIGNAL STATE           :STATE_TYPE;
SIGNAL SLAVE_W_STATE   :SLAVE_W_STATE_TYPE;
SIGNAL SUBADD_W_STATE  :SUBADD_W_STATE_TYPE;
SIGNAL SLAVE_R_STATE   :SLAVE_R_STATE_TYPE;    

SIGNAL SUBADD          : STD_LOGIC_VECTOR(7 DOWNTO 0 ) ;  -- 给SLAVE写指针寄存器
SIGNAL R_SUBADD        : STD_LOGIC_VECTOR(7 DOWNTO 0 ) ;  -- 给SLAVE写值寄存器
SIGNAL TEST_SUBADD     : STD_LOGIC_VECTOR(7 DOWNTO 0 ) ;
SIGNAL SUBADD_DATA     : STD_LOGIC_VECTOR(7 DOWNTO 0 ) ;  
SIGNAL SLAVE_W         : STD_LOGIC_VECTOR(7 DOWNTO 0 ) ;
SIGNAL SLAVE_R         : STD_LOGIC_VECTOR(7 DOWNTO 0 ) ;
SIGNAL SLAVE_R_DATA    : STD_LOGIC_VECTOR(7 DOWNTO 0 ) ;
SIGNAL BIT_CNT         : STD_LOGIC_VECTOR(3 DOWNTO 0 ) ;
SIGNAL DELAY_CNT       : STD_LOGIC_VECTOR(3 DOWNTO 0 ) ;
SIGNAL ADD             : STD_LOGIC_VECTOR(6 DOWNTO 0 ) ;
SIGNAL I2C_R_W_FLAG    : STD_LOGIC;
SIGNAL I2C_R_R_FLAG    : STD_LOGIC;
SIGNAL SLAVE_R_DATA_BIT    : STD_LOGIC;
SIGNAL SLAVE_R_DATA_FLAG   : STD_LOGIC;
SIGNAL REGISTER_NUMBER     : STD_LOGIC_VECTOR(6 DOWNTO 0);
SIGNAL REG_NUM_PART        : STD_LOGIC_VECTOR(6 DOWNTO 0);
SIGNAL REG_NUM_PART_FLAG   : STD_LOGIC_VECTOR(3 DOWNTO 0);   --寄存器分成10个部分来初始化

BEGIN
PROCESS( CLK, RST )

BEGIN
   IF rising_edge(Clk) THEN
      IF (RST='0') THEN
         CHIP_RST<='1';
         SCL<='1';
         SDA_OUT<='1';
         ENA_SDA_OUT<='1';
		     SLAVE_W<="10010000";           --90H   SLAVE 的地址和写设置
		     SLAVE_R<="10010001";           --91H   SLAVE 的地址和读设置
		     BIT_CNT<="0000";               --发送字节中的位计数器
         STATE<=I2C_START;
		     SLAVE_W_STATE<=SLAVE_W_7;      --保证每个字节都从高位开始发送   
		     SUBADD_W_STATE<=SUBADD_W_7;    --保证每个字节都从高位开始发送 
		     SLAVE_R_STATE<=SLAVE_R_SCL_ST; --
		     SUBADD<="00000001";            --开始寄存器的地址
		     R_SUBADD<="00000001";          --Read data from r_subadd
		     TEST_SUBADD<="01010101";       
		     ADD<="0000000";
	  	   I2C_R_W_FLAG<='0';             --I2C寄存器读的标志位
		     I2C_R_R_FLAG<='0';             --I2C寄存器写的标志位
		     SLAVE_R_DATA_FLAG<='0';  
		     REGISTER_NUMBER<="0000000";    
	  	   REG_NUM_PART<="0011001";	      --19H=25 寄存器的模值		   
	  	   REG_NUM_PART_FLAG<="0000";
		 

      ELSE
	     
	    
         CASE STATE IS 
           -- I2C 的启动
           WHEN  I2C_START=> 
              	           SCL<='1';
                           SDA_OUT<='1';
									         ENA_SDA_OUT<='1';
									         STATE<=I2C_START_SDA_RST;
			     WHEN  I2C_START_SDA_RST=>
			  	                 SDA_OUT<='0';
									         ENA_SDA_OUT<='1';
								        	 SCL<='1';
									         STATE<=I2C_START_SCL_RST;
			     WHEN  I2C_START_SCL_RST=>
			                     SDA_OUT<='0'; 
  									       SCL<='0';
									         STATE<=I2C_SLAVE_W;   
   					  	 
-- 只蠸CL?时，SDA才可改变?
-- 写的格式：S --- SLAVE ADDRESS W --- ACK-s --- AUBADDRESS --- ACK-s --- DATA --- ACK-s --- P
-- 其中 ACK-s:被控器接收到数据，给主控器产生的应答信号（低电平）；      \_data transferred_|
--      S    : I2C的起始信号；										  (n bytes + acknowledge)
--      p    : I2C的停止信号；
--      slave address w: '0100 0010'(42h,default) or '0100 0000'(=40h;if pin RTCostrapped to ground via a 3.3k resistor)

			  				                               
--发送SLAVE的地址和R/W控制
			     WHEN  I2C_SLAVE_W=>	                          -- SLAVE_W=42h=0100 0010
			                                                    -- SLAVE_W0=0: WRITE, =1:READ

                   CASE SLAVE_W_STATE	IS
									         WHEN SLAVE_W_7=>
									                   SDA_OUT<=SLAVE_W(7); 	  --先发送高位，在发送低位。
 									                   SCL<='0';
												             BIT_CNT<=BIT_CNT+'1';
									                   SLAVE_W_STATE<=SLAVE_W_SCL_ST;
			                     WHEN SLAVE_W_SCL_ST=>
			                               SDA_OUT<=SLAVE_W(7);
			                               SCL<='1';
			                               SLAVE_W_STATE<=SLAVE_W_SCL_RST;
			                     WHEN SLAVE_W_SCL_RST=>
			                               SCL<='0';
													           SLAVE_W<=SLAVE_W(6 DOWNTO 0)& '0';
			                               SLAVE_W_STATE<=SLAVE_W_SDA_RST;
									         WHEN SLAVE_W_SDA_RST=>
									                   SDA_OUT<='0';													 
													   IF( BIT_CNT="1000") THEN   --传送完8位