📄 mbr_reg.pin
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-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "mbr_reg" ASSIGNED TO AN EPF10K10LC84-3
clk : 1
EN_ACC : 2
q14 : 3
VCCINT : 4
ACC_IN12 : 5
RESERVED : 6
ACC_IN13 : 7
RAM_IN12 : 8
RESERVED : 9
RESERVED : 10
RESERVED : 11
DATA0 : 12
DCLK : 13
nCE : 14
TDI : 15
RAM_IN4 : 16
ACC_IN4 : 17
ACC_IN7 : 18
RAM_IN6 : 19
VCCINT : 20
q13 : 21
q1 : 22
ACC_IN3 : 23
q11 : 24
q12 : 25
GNDINT : 26
RAM_IN8 : 27
ACC_IN8 : 28
RAM_IN10 : 29
ACC_IN10 : 30
MSEL0 : 31
MSEL1 : 32
VCCINT : 33
nCONFIG : 34
RESERVED : 35
ACC_IN11 : 36
RESERVED : 37
ACC_IN14 : 38
RAM_IN13 : 39
VCCINT : 40
GNDINT : 41
READ_RAM : 42
ACC_IN1 : 43
ACC_IN0 : 44
VCCINT : 45
GNDINT : 46
RAM_IN3 : 47
q6 : 48
RAM_IN9 : 49
RESERVED : 50
ACC_IN9 : 51
RAM_IN1 : 52
ACC_IN6 : 53
RESERVED : 54
nSTATUS : 55
TRST : 56
TMS : 57
q8 : 58
q10 : 59
RAM_IN15 : 60
q15 : 61
q9 : 62
VCCINT : 63
RAM_IN14 : 64
q2 : 65
RAM_IN11 : 66
ACC_IN2 : 67
GNDINT : 68
q4 : 69
q7 : 70
RAM_IN7 : 71
ACC_IN5 : 72
q5 : 73
TDO : 74
nCEO : 75
CONF_DONE : 76
TCK : 77
q3 : 78
RAM_IN5 : 79
q0 : 80
ACC_IN15 : 81
GNDINT : 82
RAM_IN2 : 83
RAM_IN0 : 84
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