📄 test1.rpt
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-- Node name is '|CAR:3|:160'
-- Equation name is '_LC4_D9', type is buried
_LC4_D9 = LCELL( _EQ043);
_EQ043 = _LC3_D9
# _LC2_D9 & !_LC6_D1;
-- Node name is '|CAR:3|:161'
-- Equation name is '_LC3_D9', type is buried
_LC3_D9 = LCELL( _EQ044);
_EQ044 = !_LC1_D6 & !_LC1_D8 & _LC4_D10
# !_LC1_D6 & _LC1_D9 & _LC4_D10;
-- Node name is '|CAR:3|:178'
-- Equation name is '_LC7_D9', type is buried
_LC7_D9 = LCELL( _EQ045);
_EQ045 = _LC4_D10 & _LC6_D9
# !_LC6_D1 & _LC7_D1;
-- Node name is '|CAR:3|~179~1'
-- Equation name is '_LC2_D10', type is buried
-- synthesized logic cell
_LC2_D10 = LCELL( _EQ046);
_EQ046 = _LC6_D1 & !_LC7_D6;
-- Node name is '|CAR:3|~179~2'
-- Equation name is '_LC4_D10', type is buried
-- synthesized logic cell
_LC4_D10 = LCELL( _EQ047);
_EQ047 = _LC2_D10 & opcode7
# _LC2_D10 & _LC5_D6 & _LC6_D6;
-- Node name is '|CAR:3|:190'
-- Equation name is '_LC8_D10', type is buried
_LC8_D10 = LCELL( _EQ048);
_EQ048 = _LC6_D1 & !_LC7_D6 & _LC7_D10
# _LC1_D10 & !_LC6_D1;
-- Node name is '|CAR:3|:202'
-- Equation name is '_LC8_D3', type is buried
_LC8_D3 = LCELL( _EQ049);
_EQ049 = _LC6_D1 & _LC7_D3
# _LC6_D1 & _LC7_D6
# _LC1_D3 & !_LC6_D1;
-- Node name is '|CAR:3|:217'
-- Equation name is '_LC8_D1', type is buried
_LC8_D1 = LCELL( _EQ050);
_EQ050 = _LC1_D1 & !_LC1_D4 & _LC3_D1
# !_LC1_D1 & _LC1_D4 & _LC3_D1
# _LC1_D1 & !_LC3_D1 & !_LC6_D1;
-- Node name is '|CAR:3|:226'
-- Equation name is '_LC3_D11', type is buried
_LC3_D11 = LCELL( _EQ051);
_EQ051 = _LC8_D9
# _LC1_D11 & !_LC6_D1;
-- Node name is '|CAR:3|~227~1'
-- Equation name is '_LC4_D3', type is buried
-- synthesized logic cell
!_LC4_D3 = _LC4_D3~NOT;
_LC4_D3~NOT = LCELL( _EQ052);
_EQ052 = _LC2_D3
# _LC2_D6;
-- Node name is '|CAR:3|~227~2'
-- Equation name is '_LC1_D8', type is buried
-- synthesized logic cell
!_LC1_D8 = _LC1_D8~NOT;
_LC1_D8~NOT = LCELL( _EQ053);
_EQ053 = !_LC4_D3
# _LC6_D2;
-- Node name is '|CAR:3|~227~3'
-- Equation name is '_LC2_D2', type is buried
-- synthesized logic cell
!_LC2_D2 = _LC2_D2~NOT;
_LC2_D2~NOT = LCELL( _EQ054);
_EQ054 = _LC8_D2 & mpysub
# _LC8_D2 & mpyshift;
-- Node name is '|CAR:3|~227~4'
-- Equation name is '_LC1_D2', type is buried
-- synthesized logic cell
_LC1_D2 = LCELL( _EQ055);
_EQ055 = _LC2_D2 & _LC7_D2 & !mpyadd
# _LC2_D2 & _LC7_D2 & !_LC8_D2;
-- Node name is '|CAR:3|:227'
-- Equation name is '_LC8_D9', type is buried
_LC8_D9 = LCELL( _EQ056);
_EQ056 = _LC1_D2 & !_LC1_D6 & _LC1_D8 & _LC4_D10;
-- Node name is '|CAR:3|:238'
-- Equation name is '_LC6_D11', type is buried
_LC6_D11 = LCELL( _EQ057);
_EQ057 = _LC2_D11 & !_LC6_D1
# _LC8_D9;
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_0' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC6_D', type is memory
_EC6_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_1' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC8_D', type is memory
_EC8_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_2' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC5_D', type is memory
_EC5_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_3' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC1_E', type is memory
_EC1_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_4' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC8_E', type is memory
_EC8_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_5' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC4_E', type is memory
_EC4_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_6' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC2_E', type is memory
_EC2_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_7' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC5_E', type is memory
_EC5_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_8' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC3_E', type is memory
_EC3_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_9' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC3_F', type is memory
_EC3_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_10' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC4_F', type is memory
_EC4_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_11' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC6_F', type is memory
_EC6_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_12' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC1_F', type is memory
_EC1_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_13' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC2_F', type is memory
_EC2_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_14' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC7_F', type is memory
_EC7_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_15' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC8_F', type is memory
_EC8_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_16' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC5_F', type is memory
_EC5_F = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_17' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC4_A', type is memory
_EC4_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_18' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC5_A', type is memory
_EC5_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_19' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC2_A', type is memory
_EC2_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_20' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC8_A', type is memory
_EC8_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_21' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC7_A', type is memory
_EC7_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_22' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC3_A', type is memory
_EC3_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_23' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC6_A', type is memory
_EC6_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_24' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC1_A', type is memory
_EC1_A = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_25' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC2_D', type is memory
_EC2_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_26' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC7_D', type is memory
_EC7_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_27' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC1_D', type is memory
_EC1_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_28' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC4_D', type is memory
_EC4_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_29' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC7_E', type is memory
_EC7_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_30' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC6_E', type is memory
_EC6_E = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
-- Node name is '|LPM_ROM:1|altrom:srom|segment0_31' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC3_D', type is memory
_EC3_D = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_D11, _LC2_D11, _LC1_D11, _LC1_D1, _LC1_D3, _LC1_D10, _LC7_D1, _LC2_D9, VCC, VCC, VCC,);
Project Information d:\project\cpu\test1.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:00
Partitioner 00:00:00
Fitter 00:00:02
Timing SNF Extractor 00:00:00
Assembler 00:00:00
-------------------------- --------
Total Time 00:00:02
Memory Allocated
-----------------
Peak memory allocated during compilation = 18,167K
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