⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 xulieji.map.rpt

📁 在FPGA上实现序列机 用的是Altera公司的DE1板子
💻 RPT
📖 第 1 页 / 共 3 页
字号:
; G              ; 111   ; Unsigned Binary                                  ;
+----------------+-------+--------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.1 Build 156 04/30/2007 SJ Full Version
    Info: Processing started: Sun Mar 30 20:53:45 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off xulieji -c xulieji
Info: Found 1 design units, including 1 entities, in source file top.bdf
    Info: Found entity 1: top
Info: Found 1 design units, including 1 entities, in source file hex.v
    Info: Found entity 1: hex
Info: Found 1 design units, including 1 entities, in source file seqdet.v
    Info: Found entity 1: seqdet
Info: Found 1 design units, including 1 entities, in source file xulieji.v
    Info: Found entity 1: xulieji
Info: Found 1 design units, including 1 entities, in source file clkA_to_B.v
    Info: Found entity 1: clkA_to_B
Info: Found 1 design units, including 1 entities, in source file decode4_7.v
    Info: Found entity 1: decode4_7
Info: Elaborating entity "top" for the top level hierarchy
Info: Elaborating entity "xulieji" for hierarchy "xulieji:inst7"
Critical Warning (10237): Verilog HDL warning at xulieji.v(11): can't infer register for assignment in edge-triggered always construct because the clock isn't obvious. Generated combinational logic instead
Info: Elaborating entity "clkA_to_B" for hierarchy "xulieji:inst7|clkA_to_B:clkA_B"
Info: Elaborating entity "seqdet" for hierarchy "xulieji:inst7|seqdet:seqdet0"
Info: Elaborating entity "hex" for hierarchy "xulieji:inst7|hex:hex01"
Info: Elaborating entity "decode4_7" for hierarchy "xulieji:inst7|hex:hex01|decode4_7:decode0"
Warning: Reduced register "xulieji:inst7|hex:hex01|ledg" with stuck data_in port to stuck value GND
Info: Duplicate registers merged to single register
    Info: Duplicate register "xulieji:inst7|hex:hex01|h0[2]" merged to single register "xulieji:inst7|hex:hex01|h0[3]"
    Info: Duplicate register "xulieji:inst7|hex:hex01|h1[0]" merged to single register "xulieji:inst7|hex:hex01|h0[3]"
    Info: Duplicate register "xulieji:inst7|hex:hex01|h1[3]" merged to single register "xulieji:inst7|hex:hex01|h0[3]"
    Info: Duplicate register "xulieji:inst7|hex:hex01|h0[0]" merged to single register "xulieji:inst7|hex:hex01|h0[3]"
    Info: Duplicate register "xulieji:inst7|hex:hex01|h1[2]" merged to single register "xulieji:inst7|hex:hex01|h0[3]"
    Info: Duplicate register "xulieji:inst7|hex:hex01|h0[1]" merged to single register "xulieji:inst7|hex:hex01|h0[3]"
    Info: Duplicate register "xulieji:inst7|hex:hex01|h1[1]" merged to single register "xulieji:inst7|hex:hex01|h0[3]"
Warning: Reduced register "xulieji:inst7|hex:hex01|h0[3]" with stuck data_in port to stuck value GND
Info: State machine "|top|xulieji:inst7|seqdet:seqdet0|state" contains 8 states
Info: Selected Auto state machine encoding method for state machine "|top|xulieji:inst7|seqdet:seqdet0|state"
Info: Encoding result for state machine "|top|xulieji:inst7|seqdet:seqdet0|state"
    Info: Completed encoding using 8 state bits
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.D"
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.E"
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.A"
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.B"
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.C"
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.F"
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.G"
        Info: Encoded state bit "xulieji:inst7|seqdet:seqdet0|state.IDLE"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.IDLE" uses code string "00000000"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.G" uses code string "00000011"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.F" uses code string "00000101"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.C" uses code string "00001001"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.B" uses code string "00010001"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.A" uses code string "00100001"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.E" uses code string "01000001"
    Info: State "|top|xulieji:inst7|seqdet:seqdet0|state.D" uses code string "10000001"
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "LEDG" stuck at GND
    Warning: Pin "hex0[6]" stuck at VCC
    Warning: Pin "hex0[5]" stuck at GND
    Warning: Pin "hex0[4]" stuck at GND
    Warning: Pin "hex0[3]" stuck at GND
    Warning: Pin "hex0[2]" stuck at GND
    Warning: Pin "hex0[1]" stuck at GND
    Warning: Pin "hex0[0]" stuck at GND
    Warning: Pin "hex1[6]" stuck at VCC
    Warning: Pin "hex1[5]" stuck at GND
    Warning: Pin "hex1[4]" stuck at GND
    Warning: Pin "hex1[3]" stuck at GND
    Warning: Pin "hex1[2]" stuck at GND
    Warning: Pin "hex1[1]" stuck at GND
    Warning: Pin "hex1[0]" stuck at GND
Info: 36 registers lost all their fanouts during netlist optimizations. The first 36 are displayed below.
    Info: Register "inst7/seqdet0/state~17" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state~18" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state~19" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/clkB" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[23]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[22]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[21]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[20]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[19]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[18]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[17]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[16]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[15]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[14]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[13]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[12]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[11]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[10]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[9]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[8]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[7]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[6]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[5]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[4]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[3]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[2]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[1]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/clkA_B/Q[0]" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.IDLE" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.G" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.F" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.C" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.B" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.A" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.E" lost all its fanouts during netlist optimizations.
    Info: Register "inst7/seqdet0/state.D" lost all its fanouts during netlist optimizations.
Warning: Design contains 2 input pin(s) that do not drive logic
    Warning: No output dependent on input pin "rst"
    Warning: No output dependent on input pin "clkA"
Info: Implemented 17 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 15 output pins
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 22 warnings
    Info: Allocated 131 megabytes of memory during processing
    Info: Processing ended: Sun Mar 30 20:53:48 2008
    Info: Elapsed time: 00:00:03


⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -