xulieji.hif

在FPGA上实现序列机 用的是Altera公司的DE1板子

Version 7.1 Build 156 04/30/2007 SJ Full Version
11
894
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
decode4_7
# storage
db|xulieji.(5).cnf
db|xulieji.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
decode4_7.v
ef2668936e323bb0dc971171f5129854
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
xulieji:inst7|hex:hex01|decode4_7:decode0
xulieji:inst7|hex:hex01|decode4_7:decode1
}
# lmf
d:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
seqdet
# storage
db|xulieji.(3).cnf
db|xulieji.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
seqdet.v
abc1354290a4a88513a133b8f3683
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
IDLE
000
PARAMETER_UNSIGNED_BIN
DEF
A
001
PARAMETER_UNSIGNED_BIN
DEF
B
010
PARAMETER_UNSIGNED_BIN
DEF
C
011
PARAMETER_UNSIGNED_BIN
DEF
D
100
PARAMETER_UNSIGNED_BIN
DEF
E
101
PARAMETER_UNSIGNED_BIN
DEF
F
110
PARAMETER_UNSIGNED_BIN
DEF
G
111
PARAMETER_UNSIGNED_BIN
DEF
}
# hierarchies {
xulieji:inst7|seqdet:seqdet0
}
# lmf
d:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
top
# storage
db|xulieji.(2).cnf
db|xulieji.(2).cnf
# case_insensitive
# source_file
top.bdf
cc627523d9e7bdf6723eff731fbeea28
25
# hierarchies {
|
}
# lmf
d:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
hex
# storage
db|xulieji.(4).cnf
db|xulieji.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
hex.v
e4d28e0db6d61f1132ec3d77ef289
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
xulieji:inst7|hex:hex01
}
# lmf
d:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
clkA_to_B
# storage
db|xulieji.(1).cnf
db|xulieji.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
clkA_to_B.v
275f09c69e945e17337c635a78f1018
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
xulieji:inst7|clkA_to_B:clkA_B
}
# lmf
d:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
xulieji
# storage
db|xulieji.(0).cnf
db|xulieji.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
xulieji.v
57b82462b4f8efdb8d74304e4e6ac34f
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
xulieji:inst7
}
# lmf
d:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# complete