xulieji.map.summary

来自「在FPGA上实现序列机 用的是Altera公司的DE1板子」· SUMMARY 代码 · 共 15 行

Analysis & Synthesis Status : Successful - Sun Mar 30 20:53:48 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : xulieji
Top-level Entity Name : top
Family : Cyclone II
Total logic elements : 0
    Total combinational functions : 0
    Dedicated logic registers : 0
Total registers : 0
Total pins : 17
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0