de1_pin_assignments.csv

在FPGA上实现序列机 用的是Altera公司的DE1板子

# Copyright (C) 1991-2006 Altera Corporation,,,
# Your use of Altera Corporation's design tools, logic functions ,,
# and other software and tools, and its AMPP partner logic ,,
# functions, and any output files any of the foregoing ,,
# (including device programming or simulation files), and any ,,
# associated documentation or information are expressly subject ,,,
# to the terms and conditions of the Altera Program License ,,,
# Subscription Agreement, Altera MegaCore Function License ,,
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of ,,
# programming logic devices manufactured by Altera and sold by ,,,
# Altera or its authorized distributors.  Please refer to the ,,,
# applicable agreement for further details.,,,

# Quartus II Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version,,,
# File: C:\DE1\DE1_TOP\DE1_TOP.csv,,,
# Generated on: Wed Sep 27 14:39:29 2006,,,,

# Note: The column header names should not be changed if you wish to import this .csv file into the Quartus II software.,,,,

From,To,Assignment Name,Value,Enabled
,hex0[0],Location,PIN_J2,Yes
,hex0[1],Location,PIN_J1,Yes
,hex0[2],Location,PIN_H2,Yes
,hex0[3],Location,PIN_H1,Yes
,hex0[4],Location,PIN_F2,Yes
,hex0[5],Location,PIN_F1,Yes
,hex0[6],Location,PIN_E2,Yes
,hex1[0],Location,PIN_E1,Yes
,hex1[1],Location,PIN_H6,Yes
,hex1[2],Location,PIN_H5,Yes
,hex1[3],Location,PIN_H4,Yes
,hex1[4],Location,PIN_G3,Yes
,hex1[5],Location,PIN_D2,Yes
,hex1[6],Location,PIN_D1,Yes
,rst,Location,PIN_R22,Yes
,LEDG,Location,PIN_U22,Yes
,clkA,Location,PIN_L1,Yes