runsim_1553.do

用Verilog HDL实现的1553B航空电子总线接口。

onbreak {resume}

quit -sim

if {![file exists work]} {
     vlib work
}


vmap work work

vlog ../../../source/encoder_1553.v 
vlog ../../../source/decoder_1553.v 
vlog ../../../testbench/test_1553.v 

vsim work.test_1553 -l result.log -L work  
view structure
view signals

add wave -r /*
run 359400 ps