alt_synch_pipe_fb3.tdf

dpsk调制编码 vhdl硬件实现

--dffpipe DELAY=3 WIDTH=13 clock clrn d q
--VERSION_BEGIN 4.2 cbx_a_gray2bin 2004:03:06:00:52:20:SJ cbx_a_graycounter 2004:07:21:16:27:34:SJ cbx_altdpram 2004:08:15:21:15:28:SJ cbx_altsyncram 2004:11:16:15:31:02:SJ cbx_cycloneii 2004:08:25:19:39:42:SJ cbx_dcfifo 2004:08:15:21:16:08:SJ cbx_fifo_common 2003:08:19:18:07:00:SJ cbx_flex10ke 2002:10:18:16:54:38:SJ cbx_lpm_add_sub 2004:10:25:10:56:48:SJ cbx_lpm_compare 2004:10:18:11:29:46:SJ cbx_lpm_counter 2004:10:25:23:03:40:SJ cbx_lpm_decode 2004:08:15:21:16:20:SJ cbx_lpm_mux 2004:08:15:21:16:24:SJ cbx_mgl 2004:10:26:10:32:18:SJ cbx_scfifo 2004:08:15:21:16:30:SJ cbx_stratix 2004:09:23:18:28:34:SJ cbx_stratixii 2004:08:10:15:01:36:SJ cbx_util_mgl 2004:09:29:16:04:00:SJ  VERSION_END


--  Copyright (C) 1988-2002 Altera Corporation
--  Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
--  support information,  device programming or simulation file,  and any other
--  associated  documentation or information  provided by  Altera  or a partner
--  under  Altera's   Megafunction   Partnership   Program  may  be  used  only
--  to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
--  other  use  of such  megafunction  design,  netlist,  support  information,
--  device programming or simulation file,  or any other  related documentation
--  or information  is prohibited  for  any  other purpose,  including, but not
--  limited to  modification,  reverse engineering,  de-compiling, or use  with
--  any other  silicon devices,  unless such use is  explicitly  licensed under
--  a separate agreement with  Altera  or a megafunction partner.  Title to the
--  intellectual property,  including patents,  copyrights,  trademarks,  trade
--  secrets,  or maskworks,  embodied in any such megafunction design, netlist,
--  support  information,  device programming or simulation file,  or any other
--  related documentation or information provided by  Altera  or a megafunction
--  partner, remains with Altera, the megafunction partner, or their respective
--  licensors. No other licenses, including any licenses needed under any third
--  party's intellectual property, are provided herein.


FUNCTION dffpipe_fb3 (clock, clrn, d[12..0])
RETURNS ( q[12..0]);

--synthesis_resources = lut 39 
OPTIONS ALTERA_INTERNAL_OPTION = "X_ON_VIOLATION_OPTION=OFF";

SUBDESIGN alt_synch_pipe_fb3
( 
	clock	:	input;
	clrn	:	input;
	d[12..0]	:	input;
	q[12..0]	:	output;
) 
VARIABLE 
	dffpipe6 : dffpipe_fb3;

BEGIN 
	dffpipe6.clock = clock;
	dffpipe6.clrn = clrn;
	dffpipe6.d[] = d[];
	q[] = dffpipe6.q[];
END;
--VALID FILE