read_test_hier_info

dpsk调制编码 vhdl硬件实现

clrn => dffe27a[1].ACLR
clrn => dffe27a[0].ACLR
q[0] <= dffe27a[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= dffe27a[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= dffe27a[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= dffe27a[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= dffe27a[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= dffe27a[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= dffe27a[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= dffe27a[7].DB_MAX_OUTPUT_PORT_TYPE
q[8] <= dffe27a[8].DB_MAX_OUTPUT_PORT_TYPE
q[9] <= dffe27a[9].DB_MAX_OUTPUT_PORT_TYPE
q[10] <= dffe27a[10].DB_MAX_OUTPUT_PORT_TYPE
q[11] <= dffe27a[11].DB_MAX_OUTPUT_PORT_TYPE
q[12] <= dffe27a[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|dffpipe_cb3:dffpipe18
clock => dffe27a[12].CLK
clock => dffe27a[11].CLK
clock => dffe27a[10].CLK
clock => dffe27a[9].CLK
clock => dffe27a[8].CLK
clock => dffe27a[7].CLK
clock => dffe27a[6].CLK
clock => dffe27a[5].CLK
clock => dffe27a[4].CLK
clock => dffe27a[3].CLK
clock => dffe27a[2].CLK
clock => dffe27a[1].CLK
clock => dffe27a[0].CLK
clrn => dffe27a[12].ACLR
clrn => dffe27a[11].ACLR
clrn => dffe27a[10].ACLR
clrn => dffe27a[9].ACLR
clrn => dffe27a[8].ACLR
clrn => dffe27a[7].ACLR
clrn => dffe27a[6].ACLR
clrn => dffe27a[5].ACLR
clrn => dffe27a[4].ACLR
clrn => dffe27a[3].ACLR
clrn => dffe27a[2].ACLR
clrn => dffe27a[1].ACLR
clrn => dffe27a[0].ACLR
q[0] <= dffe27a[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= dffe27a[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= dffe27a[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= dffe27a[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= dffe27a[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= dffe27a[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= dffe27a[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= dffe27a[7].DB_MAX_OUTPUT_PORT_TYPE
q[8] <= dffe27a[8].DB_MAX_OUTPUT_PORT_TYPE
q[9] <= dffe27a[9].DB_MAX_OUTPUT_PORT_TYPE
q[10] <= dffe27a[10].DB_MAX_OUTPUT_PORT_TYPE
q[11] <= dffe27a[11].DB_MAX_OUTPUT_PORT_TYPE
q[12] <= dffe27a[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|dffpipe_cb3:dffpipe19
clock => dffe27a[12].CLK
clock => dffe27a[11].CLK
clock => dffe27a[10].CLK
clock => dffe27a[9].CLK
clock => dffe27a[8].CLK
clock => dffe27a[7].CLK
clock => dffe27a[6].CLK
clock => dffe27a[5].CLK
clock => dffe27a[4].CLK
clock => dffe27a[3].CLK
clock => dffe27a[2].CLK
clock => dffe27a[1].CLK
clock => dffe27a[0].CLK
clrn => dffe27a[12].ACLR
clrn => dffe27a[11].ACLR
clrn => dffe27a[10].ACLR
clrn => dffe27a[9].ACLR
clrn => dffe27a[8].ACLR
clrn => dffe27a[7].ACLR
clrn => dffe27a[6].ACLR
clrn => dffe27a[5].ACLR
clrn => dffe27a[4].ACLR
clrn => dffe27a[3].ACLR
clrn => dffe27a[2].ACLR
clrn => dffe27a[1].ACLR
clrn => dffe27a[0].ACLR
q[0] <= dffe27a[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= dffe27a[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= dffe27a[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= dffe27a[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= dffe27a[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= dffe27a[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= dffe27a[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= dffe27a[7].DB_MAX_OUTPUT_PORT_TYPE
q[8] <= dffe27a[8].DB_MAX_OUTPUT_PORT_TYPE
q[9] <= dffe27a[9].DB_MAX_OUTPUT_PORT_TYPE
q[10] <= dffe27a[10].DB_MAX_OUTPUT_PORT_TYPE
q[11] <= dffe27a[11].DB_MAX_OUTPUT_PORT_TYPE
q[12] <= dffe27a[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|dffpipe_cb3:dffpipe20
clock => dffe27a[12].CLK
clock => dffe27a[11].CLK
clock => dffe27a[10].CLK
clock => dffe27a[9].CLK
clock => dffe27a[8].CLK
clock => dffe27a[7].CLK
clock => dffe27a[6].CLK
clock => dffe27a[5].CLK
clock => dffe27a[4].CLK
clock => dffe27a[3].CLK
clock => dffe27a[2].CLK
clock => dffe27a[1].CLK
clock => dffe27a[0].CLK
clrn => dffe27a[12].ACLR
clrn => dffe27a[11].ACLR
clrn => dffe27a[10].ACLR
clrn => dffe27a[9].ACLR
clrn => dffe27a[8].ACLR
clrn => dffe27a[7].ACLR
clrn => dffe27a[6].ACLR
clrn => dffe27a[5].ACLR
clrn => dffe27a[4].ACLR
clrn => dffe27a[3].ACLR
clrn => dffe27a[2].ACLR
clrn => dffe27a[1].ACLR
clrn => dffe27a[0].ACLR
q[0] <= dffe27a[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= dffe27a[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= dffe27a[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= dffe27a[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= dffe27a[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= dffe27a[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= dffe27a[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= dffe27a[7].DB_MAX_OUTPUT_PORT_TYPE
q[8] <= dffe27a[8].DB_MAX_OUTPUT_PORT_TYPE
q[9] <= dffe27a[9].DB_MAX_OUTPUT_PORT_TYPE
q[10] <= dffe27a[10].DB_MAX_OUTPUT_PORT_TYPE
q[11] <= dffe27a[11].DB_MAX_OUTPUT_PORT_TYPE
q[12] <= dffe27a[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|add_sub_cqb:add_sub15
result[0] <= add_sub_cella[0].DB_MAX_OUTPUT_PORT_TYPE
result[1] <= add_sub_cella[1].DB_MAX_OUTPUT_PORT_TYPE
result[2] <= add_sub_cella[2].DB_MAX_OUTPUT_PORT_TYPE
result[3] <= add_sub_cella[3].DB_MAX_OUTPUT_PORT_TYPE
result[4] <= add_sub_cella[4].DB_MAX_OUTPUT_PORT_TYPE
result[5] <= add_sub_cella[5].DB_MAX_OUTPUT_PORT_TYPE
result[6] <= add_sub_cella[6].DB_MAX_OUTPUT_PORT_TYPE
result[7] <= add_sub_cella[7].DB_MAX_OUTPUT_PORT_TYPE
result[8] <= add_sub_cella[8].DB_MAX_OUTPUT_PORT_TYPE
result[9] <= add_sub_cella[9].DB_MAX_OUTPUT_PORT_TYPE
result[10] <= add_sub_cella[10].DB_MAX_OUTPUT_PORT_TYPE
result[11] <= add_sub_cella[11].DB_MAX_OUTPUT_PORT_TYPE
result[12] <= add_sub_cella[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|add_sub_cqb:add_sub16
result[0] <= add_sub_cella[0].DB_MAX_OUTPUT_PORT_TYPE
result[1] <= add_sub_cella[1].DB_MAX_OUTPUT_PORT_TYPE
result[2] <= add_sub_cella[2].DB_MAX_OUTPUT_PORT_TYPE
result[3] <= add_sub_cella[3].DB_MAX_OUTPUT_PORT_TYPE
result[4] <= add_sub_cella[4].DB_MAX_OUTPUT_PORT_TYPE
result[5] <= add_sub_cella[5].DB_MAX_OUTPUT_PORT_TYPE
result[6] <= add_sub_cella[6].DB_MAX_OUTPUT_PORT_TYPE
result[7] <= add_sub_cella[7].DB_MAX_OUTPUT_PORT_TYPE
result[8] <= add_sub_cella[8].DB_MAX_OUTPUT_PORT_TYPE
result[9] <= add_sub_cella[9].DB_MAX_OUTPUT_PORT_TYPE
result[10] <= add_sub_cella[10].DB_MAX_OUTPUT_PORT_TYPE
result[11] <= add_sub_cella[11].DB_MAX_OUTPUT_PORT_TYPE
result[12] <= add_sub_cella[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|lpm_counter:cntr1
clock => alt_counter_stratix:wysi_counter.clock
cnt_en => alt_counter_stratix:wysi_counter.cnt_en
aclr => alt_counter_stratix:wysi_counter.aclr
q[0] <= alt_counter_stratix:wysi_counter.q[0]
q[1] <= alt_counter_stratix:wysi_counter.q[1]
q[2] <= alt_counter_stratix:wysi_counter.q[2]
q[3] <= alt_counter_stratix:wysi_counter.q[3]
q[4] <= alt_counter_stratix:wysi_counter.q[4]
q[5] <= alt_counter_stratix:wysi_counter.q[5]
q[6] <= alt_counter_stratix:wysi_counter.q[6]
q[7] <= alt_counter_stratix:wysi_counter.q[7]
q[8] <= alt_counter_stratix:wysi_counter.q[8]
q[9] <= alt_counter_stratix:wysi_counter.q[9]
q[10] <= alt_counter_stratix:wysi_counter.q[10]
q[11] <= alt_counter_stratix:wysi_counter.q[11]
q[12] <= alt_counter_stratix:wysi_counter.q[12]
cout <= alt_counter_stratix:wysi_counter.cout


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|lpm_counter:cntr1|alt_counter_stratix:wysi_counter
clock => counter_cell[12].CLK
clock => counter_cell[11].CLK
clock => counter_cell[10].CLK
clock => counter_cell[9].CLK
clock => counter_cell[8].CLK
clock => counter_cell[7].CLK
clock => counter_cell[6].CLK
clock => counter_cell[5].CLK
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
clk_en => counter_cell[12].ENA
clk_en => counter_cell[11].ENA
clk_en => counter_cell[10].ENA
clk_en => counter_cell[9].ENA
clk_en => counter_cell[8].ENA
clk_en => counter_cell[7].ENA
clk_en => counter_cell[6].ENA
clk_en => counter_cell[5].ENA
clk_en => counter_cell[4].ENA
clk_en => counter_cell[3].ENA
clk_en => counter_cell[2].ENA
clk_en => counter_cell[1].ENA
clk_en => counter_cell[0].ENA
cnt_en => counter_cell[12].DATAB
cnt_en => counter_cell[11].DATAB
cnt_en => counter_cell[10].DATAB
cnt_en => counter_cell[9].DATAB
cnt_en => counter_cell[8].DATAB
cnt_en => counter_cell[7].DATAB
cnt_en => counter_cell[6].DATAB
cnt_en => counter_cell[5].DATAB
cnt_en => counter_cell[4].DATAB
cnt_en => counter_cell[3].DATAB
cnt_en => counter_cell[2].DATAB
cnt_en => counter_cell[1].DATAB
cnt_en => counter_cell[0].DATAB
sclr => counter_cell[12].SCLR
sclr => counter_cell[11].SCLR
sclr => counter_cell[10].SCLR
sclr => counter_cell[9].SCLR
sclr => counter_cell[8].SCLR
sclr => counter_cell[7].SCLR
sclr => counter_cell[6].SCLR
sclr => counter_cell[5].SCLR
sclr => counter_cell[4].SCLR
sclr => counter_cell[3].SCLR
sclr => counter_cell[2].SCLR
sclr => counter_cell[1].SCLR
sclr => counter_cell[0].SCLR
aclr => counter_cell[12].ACLR
aclr => counter_cell[11].ACLR
aclr => counter_cell[10].ACLR
aclr => counter_cell[9].ACLR
aclr => counter_cell[8].ACLR
aclr => counter_cell[7].ACLR
aclr => counter_cell[6].ACLR
aclr => counter_cell[5].ACLR
aclr => counter_cell[4].ACLR
aclr => counter_cell[3].ACLR
aclr => counter_cell[2].ACLR
aclr => counter_cell[1].ACLR
aclr => counter_cell[0].ACLR
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
q[5] <= counter_cell[5].REGOUT
q[6] <= counter_cell[6].REGOUT
q[7] <= counter_cell[7].REGOUT
q[8] <= counter_cell[8].REGOUT
q[9] <= counter_cell[9].REGOUT
q[10] <= counter_cell[10].REGOUT
q[11] <= counter_cell[11].REGOUT
q[12] <= counter_cell[12].REGOUT
cout <= cout_bit.COMBOUT


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|lpm_counter:cntr2
clock => alt_counter_stratix:wysi_counter.clock
cnt_en => alt_counter_stratix:wysi_counter.cnt_en
aclr => alt_counter_stratix:wysi_counter.aclr
q[0] <= alt_counter_stratix:wysi_counter.q[0]
q[1] <= alt_counter_stratix:wysi_counter.q[1]
q[2] <= alt_counter_stratix:wysi_counter.q[2]
q[3] <= alt_counter_stratix:wysi_counter.q[3]
q[4] <= alt_counter_stratix:wysi_counter.q[4]
q[5] <= alt_counter_stratix:wysi_counter.q[5]
q[6] <= alt_counter_stratix:wysi_counter.q[6]
q[7] <= alt_counter_stratix:wysi_counter.q[7]
q[8] <= alt_counter_stratix:wysi_counter.q[8]
q[9] <= alt_counter_stratix:wysi_counter.q[9]
q[10] <= alt_counter_stratix:wysi_counter.q[10]
q[11] <= alt_counter_stratix:wysi_counter.q[11]
q[12] <= alt_counter_stratix:wysi_counter.q[12]
cout <= alt_counter_stratix:wysi_counter.cout


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_9f31:auto_generated|lpm_counter:cntr2|alt_counter_stratix:wysi_counter
clock => counter_cell[12].CLK
clock => counter_cell[11].CLK
clock => counter_cell[10].CLK
clock => counter_cell[9].CLK
clock => counter_cell[8].CLK
clock => counter_cell[7].CLK
clock => counter_cell[6].CLK
clock => counter_cell[5].CLK
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
clk_en => counter_cell[12].ENA
clk_en => counter_cell[11].ENA
clk_en => counter_cell[10].ENA
clk_en => counter_cell[9].ENA
clk_en => counter_cell[8].ENA
clk_en => counter_cell[7].ENA
clk_en => counter_cell[6].ENA
clk_en => counter_cell[5].ENA
clk_en => counter_cell[4].ENA
clk_en => counter_cell[3].ENA
clk_en => counter_cell[2].ENA
clk_en => counter_cell[1].ENA
clk_en => counter_cell[0].ENA
cnt_en => counter_cell[12].DATAB
cnt_en => counter_cell[11].DATAB
cnt_en => counter_cell[10].DATAB
cnt_en => counter_cell[9].DATAB
cnt_en => counter_cell[8].DATAB
cnt_en => counter_cell[7].DATAB
cnt_en => counter_cell[6].DATAB
cnt_en => counter_cell[5].DATAB
cnt_en => counter_cell[4].DATAB
cnt_en => counter_cell[3].DATAB
cnt_en => counter_cell[2].DATAB
cnt_en => counter_cell[1].DATAB
cnt_en => counter_cell[0].DATAB
sclr => counter_cell[12].SCLR
sclr => counter_cell[11].SCLR
sclr => counter_cell[10].SCLR
sclr => counter_cell[9].SCLR
sclr => counter_cell[8].SCLR
sclr => counter_cell[7].SCLR
sclr => counter_cell[6].SCLR
sclr => counter_cell[5].SCLR
sclr => counter_cell[4].SCLR
sclr => counter_cell[3].SCLR
sclr => counter_cell[2].SCLR
sclr => counter_cell[1].SCLR
sclr => counter_cell[0].SCLR
aclr => counter_cell[12].ACLR
aclr => counter_cell[11].ACLR
aclr => counter_cell[10].ACLR
aclr => counter_cell[9].ACLR
aclr => counter_cell[8].ACLR
aclr => counter_cell[7].ACLR
aclr => counter_cell[6].ACLR
aclr => counter_cell[5].ACLR
aclr => counter_cell[4].ACLR
aclr =