read_test.hier_info

dpsk调制编码 vhdl硬件实现

|read_test
rfifo_renL_test <= rfifo_renL.DB_MAX_OUTPUT_PORT_TYPE
rfifo_renL => rfifo_renL_test.DATAIN
rfifo_renL => inst9.IN0
wrfull_test <= fifo_test:inst2.wrfull
clk => pll_test:inst.inclk0
fifo_clk => inst6.IN0
fifo_clk => fifo_test:inst2.rdclk
fifo_clk => fifo_clk_test.DATAIN
rcontrol_enL => inst4.IN0
rcontrol_enL => rcontrol_enL_test.DATAIN
reset => inst3.IN0
fifo_clk_test <= fifo_clk.DB_MAX_OUTPUT_PORT_TYPE
fifo_reset_test <= inst5.DB_MAX_OUTPUT_PORT_TYPE
rcontrol_enL_test <= rcontrol_enL.DB_MAX_OUTPUT_PORT_TYPE
data_out[0] <= bustri_test:inst8.tridata[0]
data_out[1] <= bustri_test:inst8.tridata[1]
data_out[2] <= bustri_test:inst8.tridata[2]
data_out[3] <= bustri_test:inst8.tridata[3]
data_out[4] <= bustri_test:inst8.tridata[4]
data_out[5] <= bustri_test:inst8.tridata[5]
data_out[6] <= bustri_test:inst8.tridata[6]
data_out[7] <= bustri_test:inst8.tridata[7]
data_out[8] <= bustri_test:inst8.tridata[8]
data_out[9] <= bustri_test:inst8.tridata[9]
data_out[10] <= bustri_test:inst8.tridata[10]
data_out[11] <= bustri_test:inst8.tridata[11]
data_out[12] <= bustri_test:inst8.tridata[12]
data_out[13] <= bustri_test:inst8.tridata[13]
data_out[14] <= bustri_test:inst8.tridata[14]
data_out[15] <= bustri_test:inst8.tridata[15]


|read_test|fifo_test:inst2
data[0] => data[0]~15.IN1
data[1] => data[1]~14.IN1
data[2] => data[2]~13.IN1
data[3] => data[3]~12.IN1
data[4] => data[4]~11.IN1
data[5] => data[5]~10.IN1
data[6] => data[6]~9.IN1
data[7] => data[7]~8.IN1
data[8] => data[8]~7.IN1
data[9] => data[9]~6.IN1
data[10] => data[10]~5.IN1
data[11] => data[11]~4.IN1
data[12] => data[12]~3.IN1
data[13] => data[13]~2.IN1
data[14] => data[14]~1.IN1
data[15] => data[15]~0.IN1
wrreq => wrreq~0.IN1
rdreq => rdreq~0.IN1
rdclk => rdclk~0.IN1
wrclk => wrclk~0.IN1
aclr => aclr~0.IN1
q[0] <= dcfifo:dcfifo_component.q
q[1] <= dcfifo:dcfifo_component.q
q[2] <= dcfifo:dcfifo_component.q
q[3] <= dcfifo:dcfifo_component.q
q[4] <= dcfifo:dcfifo_component.q
q[5] <= dcfifo:dcfifo_component.q
q[6] <= dcfifo:dcfifo_component.q
q[7] <= dcfifo:dcfifo_component.q
q[8] <= dcfifo:dcfifo_component.q
q[9] <= dcfifo:dcfifo_component.q
q[10] <= dcfifo:dcfifo_component.q
q[11] <= dcfifo:dcfifo_component.q
q[12] <= dcfifo:dcfifo_component.q
q[13] <= dcfifo:dcfifo_component.q
q[14] <= dcfifo:dcfifo_component.q
q[15] <= dcfifo:dcfifo_component.q
rdempty <= dcfifo:dcfifo_component.rdempty
wrfull <= dcfifo:dcfifo_component.wrfull


|read_test|fifo_test:inst2|dcfifo:dcfifo_component
data[0] => dcfifo_l641:auto_generated.data[0]
data[1] => dcfifo_l641:auto_generated.data[1]
data[2] => dcfifo_l641:auto_generated.data[2]
data[3] => dcfifo_l641:auto_generated.data[3]
data[4] => dcfifo_l641:auto_generated.data[4]
data[5] => dcfifo_l641:auto_generated.data[5]
data[6] => dcfifo_l641:auto_generated.data[6]
data[7] => dcfifo_l641:auto_generated.data[7]
data[8] => dcfifo_l641:auto_generated.data[8]
data[9] => dcfifo_l641:auto_generated.data[9]
data[10] => dcfifo_l641:auto_generated.data[10]
data[11] => dcfifo_l641:auto_generated.data[11]
data[12] => dcfifo_l641:auto_generated.data[12]
data[13] => dcfifo_l641:auto_generated.data[13]
data[14] => dcfifo_l641:auto_generated.data[14]
data[15] => dcfifo_l641:auto_generated.data[15]
q[0] <= dcfifo_l641:auto_generated.q[0]
q[1] <= dcfifo_l641:auto_generated.q[1]
q[2] <= dcfifo_l641:auto_generated.q[2]
q[3] <= dcfifo_l641:auto_generated.q[3]
q[4] <= dcfifo_l641:auto_generated.q[4]
q[5] <= dcfifo_l641:auto_generated.q[5]
q[6] <= dcfifo_l641:auto_generated.q[6]
q[7] <= dcfifo_l641:auto_generated.q[7]
q[8] <= dcfifo_l641:auto_generated.q[8]
q[9] <= dcfifo_l641:auto_generated.q[9]
q[10] <= dcfifo_l641:auto_generated.q[10]
q[11] <= dcfifo_l641:auto_generated.q[11]
q[12] <= dcfifo_l641:auto_generated.q[12]
q[13] <= dcfifo_l641:auto_generated.q[13]
q[14] <= dcfifo_l641:auto_generated.q[14]
q[15] <= dcfifo_l641:auto_generated.q[15]
rdclk => dcfifo_l641:auto_generated.rdclk
rdreq => dcfifo_l641:auto_generated.rdreq
wrclk => dcfifo_l641:auto_generated.wrclk
wrreq => dcfifo_l641:auto_generated.wrreq
aclr => dcfifo_l641:auto_generated.aclr
rdempty <= dcfifo_l641:auto_generated.rdempty
rdfull <= <UNC>
wrempty <= <UNC>
wrfull <= dcfifo_l641:auto_generated.wrfull
rdusedw[0] <= <UNC>
rdusedw[1] <= <UNC>
rdusedw[2] <= <UNC>
rdusedw[3] <= <UNC>
rdusedw[4] <= <UNC>
rdusedw[5] <= <UNC>
rdusedw[6] <= <UNC>
rdusedw[7] <= <UNC>
rdusedw[8] <= <UNC>
rdusedw[9] <= <UNC>
rdusedw[10] <= <UNC>
rdusedw[11] <= <UNC>
rdusedw[12] <= <UNC>
wrusedw[0] <= <UNC>
wrusedw[1] <= <UNC>
wrusedw[2] <= <UNC>
wrusedw[3] <= <UNC>
wrusedw[4] <= <UNC>
wrusedw[5] <= <UNC>
wrusedw[6] <= <UNC>
wrusedw[7] <= <UNC>
wrusedw[8] <= <UNC>
wrusedw[9] <= <UNC>
wrusedw[10] <= <UNC>
wrusedw[11] <= <UNC>
wrusedw[12] <= <UNC>


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_l641:auto_generated
aclr => a_fefifo_j0d:read_state.aclr
aclr => a_fefifo_o0d:write_state.aclr
aclr => a_graycounter_b36:rdptr_g.aclr
aclr => a_graycounter_b36:wrptr_g.aclr
aclr => cntr_n18:rdptr_b.aclr
aclr => cntr_n18:wrptr_b.aclr
aclr => tmp_aclr.IN0
data[0] => dpram_7rr:fiforam.data[0]
data[1] => dpram_7rr:fiforam.data[1]
data[2] => dpram_7rr:fiforam.data[2]
data[3] => dpram_7rr:fiforam.data[3]
data[4] => dpram_7rr:fiforam.data[4]
data[5] => dpram_7rr:fiforam.data[5]
data[6] => dpram_7rr:fiforam.data[6]
data[7] => dpram_7rr:fiforam.data[7]
data[8] => dpram_7rr:fiforam.data[8]
data[9] => dpram_7rr:fiforam.data[9]
data[10] => dpram_7rr:fiforam.data[10]
data[11] => dpram_7rr:fiforam.data[11]
data[12] => dpram_7rr:fiforam.data[12]
data[13] => dpram_7rr:fiforam.data[13]
data[14] => dpram_7rr:fiforam.data[14]
data[15] => dpram_7rr:fiforam.data[15]
q[0] <= dpram_7rr:fiforam.q[0]
q[1] <= dpram_7rr:fiforam.q[1]
q[2] <= dpram_7rr:fiforam.q[2]
q[3] <= dpram_7rr:fiforam.q[3]
q[4] <= dpram_7rr:fiforam.q[4]
q[5] <= dpram_7rr:fiforam.q[5]
q[6] <= dpram_7rr:fiforam.q[6]
q[7] <= dpram_7rr:fiforam.q[7]
q[8] <= dpram_7rr:fiforam.q[8]
q[9] <= dpram_7rr:fiforam.q[9]
q[10] <= dpram_7rr:fiforam.q[10]
q[11] <= dpram_7rr:fiforam.q[11]
q[12] <= dpram_7rr:fiforam.q[12]
q[13] <= dpram_7rr:fiforam.q[13]
q[14] <= dpram_7rr:fiforam.q[14]
q[15] <= dpram_7rr:fiforam.q[15]
rdclk => a_fefifo_j0d:read_state.clock
rdclk => a_graycounter_b36:rdptr_g.clock
rdclk => dpram_7rr:fiforam.outclock
rdclk => dffpipe_cb3:dffpipe_rdbuw.clock
rdclk => dffpipe_cb3:dffpipe_rdusedw.clock
rdclk => dffpipe_cb3:dffpipe_rs_dbwp.clock
rdclk => alt_synch_pipe_fb3:dffpipe_rs_dgwp.clock
rdclk => cntr_n18:rdptr_b.clock
rdempty <= a_fefifo_j0d:read_state.empty
rdfull <= a_fefifo_j0d:read_state.full
rdreq => a_fefifo_j0d:read_state.rreq
rdreq => valid_rreq.IN0
rdusedw[0] <= dffpipe_cb3:dffpipe_rdusedw.q[0]
rdusedw[1] <= dffpipe_cb3:dffpipe_rdusedw.q[1]
rdusedw[2] <= dffpipe_cb3:dffpipe_rdusedw.q[2]
rdusedw[3] <= dffpipe_cb3:dffpipe_rdusedw.q[3]
rdusedw[4] <= dffpipe_cb3:dffpipe_rdusedw.q[4]
rdusedw[5] <= dffpipe_cb3:dffpipe_rdusedw.q[5]
rdusedw[6] <= dffpipe_cb3:dffpipe_rdusedw.q[6]
rdusedw[7] <= dffpipe_cb3:dffpipe_rdusedw.q[7]
rdusedw[8] <= dffpipe_cb3:dffpipe_rdusedw.q[8]
rdusedw[9] <= dffpipe_cb3:dffpipe_rdusedw.q[9]
rdusedw[10] <= dffpipe_cb3:dffpipe_rdusedw.q[10]
rdusedw[11] <= dffpipe_cb3:dffpipe_rdusedw.q[11]
rdusedw[12] <= dffpipe_cb3:dffpipe_rdusedw.q[12]
wrclk => a_fefifo_o0d:write_state.clock
wrclk => a_graycounter_b36:wrptr_g.clock
wrclk => dpram_7rr:fiforam.inclock
wrclk => dffpipe_cb3:dffpipe_wr_dbuw.clock
wrclk => dffpipe_cb3:dffpipe_wrusedw.clock
wrclk => alt_synch_pipe_fb3:dffpipe_ws_dgrp.clock
wrclk => dffpipe_cb3:dffpipe_ws_nbrp.clock
wrclk => cntr_n18:wrptr_b.clock
wrclk => write_delay_cycle[12].CLK
wrclk => write_delay_cycle[11].CLK
wrclk => write_delay_cycle[10].CLK
wrclk => write_delay_cycle[9].CLK
wrclk => write_delay_cycle[8].CLK
wrclk => write_delay_cycle[7].CLK
wrclk => write_delay_cycle[6].CLK
wrclk => write_delay_cycle[5].CLK
wrclk => write_delay_cycle[4].CLK
wrclk => write_delay_cycle[3].CLK
wrclk => write_delay_cycle[2].CLK
wrclk => write_delay_cycle[1].CLK
wrclk => write_delay_cycle[0].CLK
wrempty <= a_fefifo_o0d:write_state.empty
wrfull <= a_fefifo_o0d:write_state.full
wrreq => a_fefifo_o0d:write_state.wreq
wrreq => valid_wreq.IN0
wrusedw[0] <= dffpipe_cb3:dffpipe_wrusedw.q[0]
wrusedw[1] <= dffpipe_cb3:dffpipe_wrusedw.q[1]
wrusedw[2] <= dffpipe_cb3:dffpipe_wrusedw.q[2]
wrusedw[3] <= dffpipe_cb3:dffpipe_wrusedw.q[3]
wrusedw[4] <= dffpipe_cb3:dffpipe_wrusedw.q[4]
wrusedw[5] <= dffpipe_cb3:dffpipe_wrusedw.q[5]
wrusedw[6] <= dffpipe_cb3:dffpipe_wrusedw.q[6]
wrusedw[7] <= dffpipe_cb3:dffpipe_wrusedw.q[7]
wrusedw[8] <= dffpipe_cb3:dffpipe_wrusedw.q[8]
wrusedw[9] <= dffpipe_cb3:dffpipe_wrusedw.q[9]
wrusedw[10] <= dffpipe_cb3:dffpipe_wrusedw.q[10]
wrusedw[11] <= dffpipe_cb3:dffpipe_wrusedw.q[11]
wrusedw[12] <= dffpipe_cb3:dffpipe_wrusedw.q[12]


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_l641:auto_generated|a_fefifo_j0d:read_state
clock => b_full.CLK
clock => b_non_empty.CLK
clock => b_one.CLK
clock => llreq.CLK
full <= b_full.DB_MAX_OUTPUT_PORT_TYPE
usedw_in[0] => is_one0.IN0
usedw_in[0] => is_two0.IN0
usedw_in[0] => is_zero0.IN0
usedw_in[0] => usedw_out[0].DATAIN
usedw_in[0] => op_1.IN26
usedw_in[1] => usedw_out[1].DATAIN
usedw_in[1] => op_1.IN24
usedw_in[2] => usedw_out[2].DATAIN
usedw_in[2] => op_1.IN22
usedw_in[3] => usedw_out[3].DATAIN
usedw_in[3] => op_1.IN20
usedw_in[4] => usedw_out[4].DATAIN
usedw_in[4] => op_1.IN18
usedw_in[5] => usedw_out[5].DATAIN
usedw_in[5] => op_1.IN16
usedw_in[6] => usedw_out[6].DATAIN
usedw_in[6] => op_1.IN14
usedw_in[7] => usedw_out[7].DATAIN
usedw_in[7] => op_1.IN12
usedw_in[8] => usedw_out[8].DATAIN
usedw_in[8] => op_1.IN10
usedw_in[9] => usedw_out[9].DATAIN
usedw_in[9] => op_1.IN8
usedw_in[10] => usedw_out[10].DATAIN
usedw_in[10] => op_1.IN6
usedw_in[11] => usedw_out[11].DATAIN
usedw_in[11] => op_1.IN4
usedw_in[12] => usedw_out[12].DATAIN
usedw_in[12] => op_1.IN2
usedw_out[0] <= usedw_in[0].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[1] <= usedw_in[1].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[2] <= usedw_in[2].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[3] <= usedw_in[3].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[4] <= usedw_in[4].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[5] <= usedw_in[5].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[6] <= usedw_in[6].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[7] <= usedw_in[7].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[8] <= usedw_in[8].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[9] <= usedw_in[9].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[10] <= usedw_in[10].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[11] <= usedw_in[11].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[12] <= usedw_in[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_l641:auto_generated|a_fefifo_o0d:write_state
clock => b_full.CLK
clock => b_non_empty.CLK
clock => b_one.CLK
full <= b_full.DB_MAX_OUTPUT_PORT_TYPE
usedw_in[0] => is_zero0.IN0
usedw_in[0] => usedw_out[0].DATAIN
usedw_in[0] => op_1.IN26
usedw_in[1] => usedw_out[1].DATAIN
usedw_in[1] => op_1.IN24
usedw_in[2] => usedw_out[2].DATAIN
usedw_in[2] => op_1.IN22
usedw_in[3] => usedw_out[3].DATAIN
usedw_in[3] => op_1.IN20
usedw_in[4] => usedw_out[4].DATAIN
usedw_in[4] => op_1.IN18
usedw_in[5] => usedw_out[5].DATAIN
usedw_in[5] => op_1.IN16
usedw_in[6] => usedw_out[6].DATAIN
usedw_in[6] => op_1.IN14
usedw_in[7] => usedw_out[7].DATAIN
usedw_in[7] => op_1.IN12
usedw_in[8] => usedw_out[8].DATAIN
usedw_in[8] => op_1.IN10
usedw_in[9] => usedw_out[9].DATAIN
usedw_in[9] => op_1.IN8
usedw_in[10] => usedw_out[10].DATAIN
usedw_in[10] => op_1.IN6
usedw_in[11] => usedw_out[11].DATAIN
usedw_in[11] => op_1.IN4
usedw_in[12] => usedw_out[12].DATAIN
usedw_in[12] => op_1.IN2
usedw_out[0] <= usedw_in[0].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[1] <= usedw_in[1].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[2] <= usedw_in[2].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[3] <= usedw_in[3].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[4] <= usedw_in[4].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[5] <= usedw_in[5].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[6] <= usedw_in[6].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[7] <= usedw_in[7].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[8] <= usedw_in[8].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[9] <= usedw_in[9].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[10] <= usedw_in[10].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[11] <= usedw_in[11].DB_MAX_OUTPUT_PORT_TYPE
usedw_out[12] <= usedw_in[12].DB_MAX_OUTPUT_PORT_TYPE


|read_test|fifo_test:inst2|dcfifo:dcfifo_component|dcfifo_l641:auto_generated|a_gray2bin_27b:gray2bin_rs_nbwp
bin[0] <= xor0.DB_MAX_OUTPUT_PORT_TYPE
bin[1] <= xor1.DB_MAX_OUTPUT_PORT_TYPE
bin[2] <= xor2.DB_MAX_OUTPUT_PORT_TYPE
bin[3] <= xor3.DB_MAX_OUTPUT_PORT_TYPE
bin[4] <= xor4.DB_MAX_OUTPUT_PORT_TYPE
bin[5] <= xor5.DB_MAX_OUTPUT_PORT_TYPE
bin[6] <= xor6.DB_MAX_OUTPUT_PORT_TYPE
bin[7] <= xor7.DB_MAX_OUTPUT_PORT_TYPE
bin[8] <= xor8.DB_MAX_OUTPUT_PORT_TYPE
bin[9] <= xor9.DB_MAX_OUTPUT_PORT_TYPE
bin[10] <= xor10.DB_MAX_OUTPUT_PORT_TYPE
bin[11] <= xor11.DB_MAX_OUTPUT_PORT_TYPE
bin[12] <= gray[12].DB_MAX_OUTPUT_PORT_TYPE
gray[0] => xor0.IN0
gray[1] => xor1.IN0
gray[2] => xor2.IN0
gray[3] => xor3.IN0
gray[4] => xor4.IN0
gray[5] => xor5.IN0
gray[6] => xor6.IN0
gray[7] => xor7.IN0