standard.tan.summary

nois 2cpu 硬件实现编程

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : 2.786 ns
Required Time  : 6.000 ns
Actual Time    : 3.214 ns
From           : data_to_and_from_the_ext_ssram[12]
To             : std_2C35:inst|ext_ssram_bus_avalon_slave_arbitrator:the_ext_ssram_bus_avalon_slave|incoming_data_to_and_from_the_ext_ssram[12]
From Clock     : --
To Clock       : clk_in
Failed Paths   : 0

Type           : Worst-case tco
Slack          : 0.213 ns
Required Time  : 3.300 ns
Actual Time    : 3.087 ns
From           : std_2C35:inst|ext_ssram_bus_avalon_slave_arbitrator:the_ext_ssram_bus_avalon_slave|address_to_the_ext_ssram[15]
To             : address_to_the_ext_ssram[15]
From Clock     : clk_in
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : 0.753 ns
Required Time  : 1.700 ns
Actual Time    : 0.947 ns
From           : std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\g_datapath:0:g_ddr_io|altddio_bidir:\g_dq_io:6:dq_io|ddio_bidir_c0l:auto_generated|input_latch_l[0]
To             : std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\g_datapath:0:g_ddr_io|resynched_data[6]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 3.011 ns
From           : altera_internal_jtag
To             : std_2C35:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[10]
From Clock     : --
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Setup: 'std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2'
Slack          : 0.877 ns
Required Time  : 85.01 MHz ( period = 11.764 ns )
Actual Time    : 91.85 MHz ( period = 10.887 ns )
From           : std_2C35:inst|cpu:the_cpu|M_ctrl_mul_lsw
To             : std_2C35:inst|cpu:the_cpu|M_status_reg_pie
From Clock     : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2
To Clock       : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2
Failed Paths   : 0

Type           : Clock Setup: 'std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk1'
Slack          : 6.096 ns
Required Time  : 85.01 MHz ( period = 11.764 ns )
Actual Time    : N/A
From           : std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\g_datapath:1:g_ddr_io|dm_out[0]
To             : std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\g_datapath:1:g_ddr_io|altddio_out:dm_pin|ddio_out_sbf:auto_generated|output_cell_H[0]
From Clock     : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2
To Clock       : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk1
Failed Paths   : 0

Type           : Clock Setup: 'clk_in'
Slack          : 17.202 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : 357.40 MHz ( period = 2.798 ns )
From           : std_2C35:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write1
To             : std_2C35:inst|pll:the_pll|control_reg_out[12]
From Clock     : clk_in
To Clock       : clk_in
Failed Paths   : 0

Type           : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack          : N/A
Required Time  : None
Actual Time    : 119.10 MHz ( period = 8.396 ns )
From           : sld_hub:sld_hub_inst|jtag_debug_mode_usr1
To             : std_2C35:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[14]
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Hold: 'std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2'
Slack          : 0.391 ns
Required Time  : 85.01 MHz ( period = 11.764 ns )
Actual Time    : N/A
From           : std_2C35:inst|clock_0:the_clock_0|clock_0_slave_FSM:slave_FSM|internal_slave_read_request
To             : std_2C35:inst|clock_0:the_clock_0|clock_0_slave_FSM:slave_FSM|internal_slave_read_request
From Clock     : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2
To Clock       : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2
Failed Paths   : 0

Type           : Clock Hold: 'clk_in'
Slack          : 0.391 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : N/A
From           : std_2C35:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write1
To             : std_2C35:inst|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|internal_master_write1
From Clock     : clk_in
To Clock       : clk_in
Failed Paths   : 0

Type           : Clock Hold: 'std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk1'
Slack          : 3.615 ns
Required Time  : 85.01 MHz ( period = 11.764 ns )
Actual Time    : N/A
From           : std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\g_datapath:0:g_ddr_io|dq_oe
To             : std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\g_datapath:0:g_ddr_io|altddio_bidir:\g_dq_io:1:dq_io|ddio_bidir_c0l:auto_generated|oe_cell
From Clock     : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk2
To Clock       : std_2C35:inst|pll:the_pll|altpllpll:the_pll|altpll:altpll_component|_clk1
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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