standard.pin

nois 2cpu 硬件实现编程

 -- Copyright (C) 1991-2006 Altera Corporation
 -- Your use of Altera Corporation's design tools, logic functions 
 -- and other software and tools, and its AMPP partner logic 
 -- functions, and any output files from any of the foregoing 
 -- (including device programming or simulation files), and any 
 -- associated documentation or information are expressly subject 
 -- to the terms and conditions of the Altera Program License 
 -- Subscription Agreement, Altera MegaCore Function License 
 -- Agreement, or other applicable license agreement, including, 
 -- without limitation, that your use is for the sole purpose of 
 -- programming logic devices manufactured by Altera and sold by 
 -- Altera or its authorized distributors.  Please refer to the 
 -- applicable agreement for further details.
 -- 
 -- This is a Quartus II output file. It is for reporting purposes only, and is
 -- not intended for use as a Quartus II input file. This file cannot be used
 -- to make Quartus II pin assignments - for instructions on how to make pin
 -- assignments, please see Quartus II help.
 ---------------------------------------------------------------------------------



 ---------------------------------------------------------------------------------
 -- NC            : No Connect. This pin has no internal connection to the device.
 -- VCCINT        : Dedicated power pin, which MUST be connected to VCC  (1.2V).
 -- VCCIO         : Dedicated power pin, which MUST be connected to VCC
 --                 of its bank.
 --					Bank 1:		2.5V
 --					Bank 2:		3.3V
 --					Bank 3:		3.3V
 --					Bank 4:		3.3V
 --					Bank 5:		3.3V
 --					Bank 6:		3.3V
 --					Bank 7:		3.3V
 --					Bank 8:		3.3V
 -- GND           : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
 --					It can also be used to report unused dedicated pins. The connection
 --					on the board for unused dedicated pins depends on whether this will
 --					be used in a future design. One example is device migration. When
 --					using device migration, refer to the device pin-tables. If it is a
 --					GND pin in the pin table or if it will not be used in a future design
 --					for another purpose the it MUST be connected to GND. If it is an unused
 --					dedicated pin, then it can be connected to a valid signal on the board
 --					(low, high, or toggling) if that signal is required for a different
 --					revision of the design.
 -- GND+          : Unused input pin. It can also be used to report unused dual-purpose pins.
 --					This pin should be connected to GND. It may also be connected  to a
 --					valid signal  on the board  (low, high, or toggling)  if that signal
 --					is required for a different revision of the design.
 -- GND*          : Unused  I/O  pin.   This pin can either be left unconnected or
 --           	    connected to GND.  Connecting this pin to GND will improve the
 --           	    device's immunity to noise.
 -- RESERVED      : Unused I/O pin, which MUST be left unconnected.
 -- RESERVED_INPUT    : Pin is tri-stated and should be connected to the board.
 -- RESERVED_INPUT_WITH_WEAK_PULLUP    : Pin is tri-stated with internal weak pull-up resistor.
 -- RESERVED_INPUT_WITH_BUS_HOLD       : Pin is tri-stated with bus-hold circuitry.
 ---------------------------------------------------------------------------------

Quartus II Version 6.1 Build 200 11/20/2006 SJ Full Version
CHIP  "standard"  ASSIGNED TO AN: EP2C35F672C6

Pin Name/Usage               : Location  : Dir.   : I/O Standard      : Voltage : I/O Bank  : User Assignment
-------------------------------------------------------------------------------------------------------------
GND                          : A2        : gnd    :                   :         :           :                
VCCIO3                       : A3        : power  :                   : 3.3V    : 3         :                
address_to_the_ext_ssram[14] : A4        : output : 3.3-V LVTTL       :         : 3         : Y              
address_to_the_ext_ssram[16] : A5        : output : 3.3-V LVTTL       :         : 3         : Y              
address_to_the_ext_ssram[19] : A6        : output : 3.3-V LVTTL       :         : 3         : Y              
RESERVED_INPUT               : A7        :        :                   :         : 3         :                
ext_flash_enet_bus_data[7]   : A8        : bidir  : 3.3-V LVTTL       :         : 3         : Y              
ext_flash_enet_bus_data[13]  : A9        : bidir  : 3.3-V LVTTL       :         : 3         : Y              
ext_flash_enet_bus_data[17]  : A10       : bidir  : 3.3-V LVTTL       :         : 3         : Y              
VCCIO3                       : A11       : power  :                   : 3.3V    : 3         :                
GND                          : A12       : gnd    :                   :         :           :                
GND+                         : A13       :        :                   :         : 4         :                
ext_flash_enet_bus_address[5] : A14       : output : 3.3-V LVTTL       :         : 4         : Y              
GND                          : A15       : gnd    :                   :         :           :                
VCCIO4                       : A16       : power  :                   : 3.3V    : 4         :                
ext_flash_enet_bus_address[18] : A17       : output : 3.3-V LVTTL       :         : 4         : Y              
RESERVED_INPUT               : A18       :        :                   :         : 4         :                
RESERVED_INPUT               : A19       :        :                   :         : 4         :                
RESERVED_INPUT               : A20       :        :                   :         : 4         :                
RESERVED_INPUT               : A21       :        :                   :         : 4         :                
RESERVED_INPUT               : A22       :        :                   :         : 4         :                
RESERVED_INPUT               : A23       :        :                   :         : 4         :                
VCCIO4                       : A24       : power  :                   : 3.3V    : 4         :                
GND                          : A25       : gnd    :                   :         :           :                
ddr_dm[1]                    : AA1       : output : SSTL-2 Class I    :         : 1         : Y              
ddr_a[10]                    : AA2       : output : SSTL-2 Class I    :         : 1         : Y              
RESERVED_INPUT               : AA3       :        :                   :         : 1         :                
RESERVED_INPUT               : AA4       :        :                   :         : 1         :                
RESERVED_INPUT               : AA5       :        :                   :         : 1         :                
clk_to_sdram_n[0]            : AA6       : output : SSTL-2 Class I    :         : 1         : Y              
clk_to_sdram[0]              : AA7       : output : SSTL-2 Class I    :         : 1         : Y              
VCCA_PLL1                    : AA8       : power  :                   : 1.2V    :           :                
RESERVED_INPUT               : AA9       :        :                   :         : 8         :                
in_port_to_the_button_pio[1] : AA10      : input  : 3.3-V LVTTL       :         : 8         : Y              
out_port_from_the_led_pio[7] : AA11      : output : 3.3-V LVTTL       :         : 8         : Y              
out_port_from_the_seven_seg_pio[10] : AA12      : output : 3.3-V LVTTL       :         : 8         : Y              
RESERVED_INPUT               : AA13      :        :                   :         : 7         :                
bidir_port_to_and_from_the_reconfig_request_pio : AA14      : bidir  : 3.3-V LVTTL       :         : 7         : Y              
irq_from_the_lan91c111       : AA15      : input  : 3.3-V LVTTL       :         : 7         : Y              
RESERVED_INPUT               : AA16      :        :                   :         : 7         :                
RESERVED_INPUT               : AA17      :        :                   :         : 7         :                
RESERVED_INPUT               : AA18      :        :                   :         : 7         :                
VCCA_PLL4                    : AA19      : power  :                   : 1.2V    :           :                
RESERVED_INPUT               : AA20      :        :                   :         : 7         :                
GND_PLL4                     : AA21      : gnd    :                   :         :           :                
VCCIO6                       : AA22      : power  :                   : 3.3V    : 6         :                
RESERVED_INPUT               : AA23      :        :                   :         : 6         :                
RESERVED_INPUT               : AA24      :        :                   :         : 6         :                
RESERVED_INPUT               : AA25      :        :                   :         : 6         :                
RESERVED_INPUT               : AA26      :        :                   :         : 6         :                
RESERVED_INPUT               : AB1       :        :                   :         : 1         :                
RESERVED_INPUT               : AB2       :        :                   :         : 1         :                
RESERVED_INPUT               : AB3       :        :                   :         : 1         :                
RESERVED_INPUT               : AB4       :        :                   :         : 1         :                
VCCIO1                       : AB5       : power  :                   : 2.5V    : 1         :                
VCCIO8                       : AB6       : power  :                   : 3.3V    : 8         :                
GND                          : AB7       : gnd    :                   :         :           :                
RESERVED_INPUT               : AB8       :        :                   :         : 8         :                
VCCIO8                       : AB9       : power  :                   : 3.3V    : 8         :                
in_port_to_the_button_pio[2] : AB10      : input  : 3.3-V LVTTL       :         : 8         : Y              
GND                          : AB11      : gnd    :                   :         :           :                
RESERVED_INPUT               : AB12      :        :                   :         : 8         :