ddr_sdram_estimated_data.dat

nois 2cpu 硬件实现编程

# Estimated data for Pre-Compile
set min_paths_for_each_half_dq_0(dq_capture) 928
set min_paths_for_each_half_dq_0(posten_capture) 713
# set min_paths_for_each_half_dq_0(name) {ddr_dq[0]}
# set min_paths_for_each_half_dq_0(number) 0
set min_paths_for_each_half_dq_0(clkctrl_capture) 964
# set min_paths_for_each_half_dq_0(dqs_clkctrl) 2217
set min_paths_for_each_half_dq_0(clkctrl_resync) 964
set min_paths_for_each_half_dq_0(capture_resync) 419
set min_paths_for_each_half_dq_0(clkctrl_posten) 979
set min_paths_for_each_half_dq_0(postctrl_posten) 659
set min_paths_for_each_half_dq_0(sysclk_pin) 1947

set max_paths_for_each_half_dq_0(dq_capture) 1684
set max_paths_for_each_half_dq_0(posten_capture) 1692
# set max_paths_for_each_half_dq_0(name) {ddr_dq[15]}
# set max_paths_for_each_half_dq_0(number) 31
set max_paths_for_each_half_dq_0(clkctrl_capture) 1560
# set max_paths_for_each_half_dq_0(dqs_clkctrl) 3124
set max_paths_for_each_half_dq_0(clkctrl_resync) 1560
set max_paths_for_each_half_dq_0(capture_resync) 947
set max_paths_for_each_half_dq_0(clkctrl_posten) 1562
set max_paths_for_each_half_dq_0(postctrl_posten) 1180
set max_paths_for_each_half_dq_0(sysclk_pin) 3570

set min_paths_for_each_half_dq_0(dqs_clkctrl) 537
set max_paths_for_each_half_dq_0(dqs_clkctrl) 960