ask_dem_real.hier_info

baseband解调

data[11] => data_int[11].DATAIN
data[12] => data_int1[12].DATAIN
data[12] => data_int[12].DATAIN
data[13] => data_int1[13].DATAIN
data[13] => data_int[13].DATAIN
data[14] => data_int1[14].DATAIN
data[14] => data_int[14].DATAIN
data[15] => data_int1[15].DATAIN
data[15] => data_int[15].DATAIN
data[16] => data_int1[16].DATAIN
data[16] => data_int[16].DATAIN
data[17] => data_int1[17].DATAIN
data[17] => data_int[17].DATAIN
data[18] => data_int1[18].DATAIN
data[18] => data_int[18].DATAIN
data[19] => data_int1[19].DATAIN
data[19] => data_int[19].DATAIN
data[20] => data_int1[20].DATAIN
data[20] => data_int[20].DATAIN
data[21] => data_int1[21].DATAIN
data[21] => data_int[21].DATAIN
data[22] => data_int1[22].DATAIN
data[22] => data_int[22].DATAIN
data[23] => data_int1[23].DATAIN
data[23] => data_int[23].DATAIN
data[24] => data_int1[24].DATAIN
data[24] => data_int[24].DATAIN
data[25] => data_int1[25].DATAIN
data[25] => data_int[25].DATAIN
data_count[0] => ~NO_FANOUT~
source_valid_ctrl => stall_controller_comb~0.IN1
design_stall => source_stall_s.IN1
source_stall <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
packet_error[0] => at_source_error[0]~reg0.DATAIN
packet_error[0] => valid_ctrl_inter~4.IN0
packet_error[0] => at_source_valid_int~8.IN0
packet_error[0] => source_state.start.DATAIN
packet_error[0] => source_state.st_err.DATAIN
packet_error[1] => ~NO_FANOUT~
at_source_ready => Mux1.IN2
at_source_ready => stall_controller_comb~1.IN1
at_source_ready => source_stall_int~2.OUTPUTSELECT
at_source_ready => data_wr_enb0~2.OUTPUTSELECT
at_source_ready => data_wr_enb1~1.OUTPUTSELECT
at_source_ready => Mux1.IN3
at_source_valid <= at_source_valid_s.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[0] <= at_source_data[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[1] <= at_source_data[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[2] <= at_source_data[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[3] <= at_source_data[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[4] <= at_source_data[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[5] <= at_source_data[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[6] <= at_source_data[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[7] <= at_source_data[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[8] <= at_source_data[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[9] <= at_source_data[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[10] <= at_source_data[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[11] <= at_source_data[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[12] <= at_source_data[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[13] <= at_source_data[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[14] <= at_source_data[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[15] <= at_source_data[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[16] <= at_source_data[16]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[17] <= at_source_data[17]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[18] <= at_source_data[18]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[19] <= at_source_data[19]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[20] <= at_source_data[20]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[21] <= at_source_data[21]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[22] <= at_source_data[22]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[23] <= at_source_data[23]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[24] <= at_source_data[24]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_data[25] <= at_source_data[25]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_channel[0] <= <GND>
at_source_error[0] <= at_source_error[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_error[1] <= at_source_error[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
at_source_sop <= at_source_sop_s.DB_MAX_OUTPUT_PORT_TYPE
at_source_eop <= at_source_eop_s.DB_MAX_OUTPUT_PORT_TYPE


|ask_dem_real|fir_Q1:inst16|fir_Q1_new:fir_Q1_new_inst|auk_dspip_avalon_streaming_controller:intf_ctrl
clk => source_packet_error[0]~reg0.CLK
clk => source_packet_error[1]~reg0.CLK
clk => stall_reg.CLK
clk => source_stall_reg.CLK
clk => sink_stall_reg.CLK
clk => res.CLK
clk_en => source_valid_ctrl~1.IN0
clk_en => sink_ready_ctrl~1.IN1
clk_en => stall~0.OUTPUTSELECT
reset_n => res.DATAIN
reset_n => source_packet_error[0]~reg0.ACLR
reset_n => source_packet_error[1]~reg0.ACLR
reset_n => stall_reg.ACLR
reset_n => source_stall_reg.ACLR
reset_n => sink_stall_reg.ACLR
ready => sink_ready_ctrl~0.IN1
ready => sink_ready_ctrl~2.DATAA
sink_packet_error[0] => source_packet_error[0]~reg0.DATAIN
sink_packet_error[1] => source_packet_error[1]~reg0.DATAIN
sink_stall => stall_int.IN0
sink_stall => sink_stall_reg.DATAIN
source_stall => stall_int.IN1
source_stall => source_stall_reg.DATAIN
valid => source_valid_ctrl~0.IN1
valid => source_valid_ctrl~2.DATAA
reset_design <= res.DB_MAX_OUTPUT_PORT_TYPE
sink_ready_ctrl <= sink_ready_ctrl~2.DB_MAX_OUTPUT_PORT_TYPE
source_packet_error[0] <= source_packet_error[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
source_packet_error[1] <= source_packet_error[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
source_valid_ctrl <= source_valid_ctrl~2.DB_MAX_OUTPUT_PORT_TYPE
stall <= stall~0.DB_MAX_OUTPUT_PORT_TYPE


|ask_dem_real|fir_Q1:inst16|fir_Q1_new:fir_Q1_new_inst|fir_Q1_st:fir_core
clk => clk~0.IN125
rst => rst~0.IN21
data_in[0] => data_in[0]~13.IN1
data_in[1] => data_in[1]~12.IN1
data_in[2] => data_in[2]~11.IN1
data_in[3] => data_in[3]~10.IN1
data_in[4] => data_in[4]~9.IN1
data_in[5] => data_in[5]~8.IN1
data_in[6] => data_in[6]~7.IN1
data_in[7] => data_in[7]~6.IN1
data_in[8] => data_in[8]~5.IN1
data_in[9] => data_in[9]~4.IN1
data_in[10] => data_in[10]~3.IN1
data_in[11] => data_in[11]~2.IN1
data_in[12] => data_in[12]~1.IN1
data_in[13] => data_in[13]~0.IN1
clk_en => clk_en~0.IN104
rdy_to_ld <= par_ctrl:Uctrl.rdy_to_ld
done <= par_ctrl:Uctrl.done
fir_result[0] <= mac_tl:Umtl.data_out
fir_result[1] <= mac_tl:Umtl.data_out
fir_result[2] <= mac_tl:Umtl.data_out
fir_result[3] <= mac_tl:Umtl.data_out
fir_result[4] <= mac_tl:Umtl.data_out
fir_result[5] <= mac_tl:Umtl.data_out
fir_result[6] <= mac_tl:Umtl.data_out
fir_result[7] <= mac_tl:Umtl.data_out
fir_result[8] <= mac_tl:Umtl.data_out
fir_result[9] <= mac_tl:Umtl.data_out
fir_result[10] <= mac_tl:Umtl.data_out
fir_result[11] <= mac_tl:Umtl.data_out
fir_result[12] <= mac_tl:Umtl.data_out
fir_result[13] <= mac_tl:Umtl.data_out
fir_result[14] <= mac_tl:Umtl.data_out
fir_result[15] <= mac_tl:Umtl.data_out
fir_result[16] <= mac_tl:Umtl.data_out
fir_result[17] <= mac_tl:Umtl.data_out
fir_result[18] <= mac_tl:Umtl.data_out
fir_result[19] <= mac_tl:Umtl.data_out
fir_result[20] <= mac_tl:Umtl.data_out
fir_result[21] <= mac_tl:Umtl.data_out
fir_result[22] <= mac_tl:Umtl.data_out
fir_result[23] <= mac_tl:Umtl.data_out
fir_result[24] <= mac_tl:Umtl.data_out
fir_result[25] <= mac_tl:Umtl.data_out


|ask_dem_real|fir_Q1:inst16|fir_Q1_new:fir_Q1_new_inst|fir_Q1_st:fir_core|tdl_da_lc:Utdldalc0n
clk => data_out[12]~reg0.CLK
clk => data_out[11]~reg0.CLK
clk => data_out[10]~reg0.CLK
clk => data_out[9]~reg0.CLK
clk => data_out[8]~reg0.CLK
clk => data_out[7]~reg0.CLK
clk => data_out[6]~reg0.CLK
clk => data_out[5]~reg0.CLK
clk => data_out[4]~reg0.CLK
clk => data_out[3]~reg0.CLK
clk => data_out[2]~reg0.CLK
clk => data_out[1]~reg0.CLK
clk => data_out[0]~reg0.CLK
clk => data_out[13]~reg0.CLK
rst => data_out~14.OUTPUTSELECT
rst => data_out~15.OUTPUTSELECT
rst => data_out~16.OUTPUTSELECT
rst => data_out~17.OUTPUTSELECT
rst => data_out~18.OUTPUTSELECT
rst => data_out~19.OUTPUTSELECT
rst => data_out~20.OUTPUTSELECT
rst => data_out~21.OUTPUTSELECT
rst => data_out~22.OUTPUTSELECT
rst => data_out~23.OUTPUTSELECT
rst => data_out~24.OUTPUTSELECT
rst => data_out~25.OUTPUTSELECT
rst => data_out~26.OUTPUTSELECT
rst => data_out~27.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
clk_en => data_out~1.OUTPUTSELECT
clk_en => data_out~2.OUTPUTSELECT
clk_en => data_out~3.OUTPUTSELECT
clk_en => data_out~4.OUTPUTSELECT
clk_en => data_out~5.OUTPUTSELECT
clk_en => data_out~6.OUTPUTSELECT
clk_en => data_out~7.OUTPUTSELECT
clk_en => data_out~8.OUTPUTSELECT
clk_en => data_out~9.OUTPUTSELECT
clk_en => data_out~10.OUTPUTSELECT
clk_en => data_out~11.OUTPUTSELECT
clk_en => data_out~12.OUTPUTSELECT
clk_en => data_out~13.OUTPUTSELECT
data_in[0] => data_out~13.DATAB
data_in[1] => data_out~12.DATAB
data_in[2] => data_out~11.DATAB
data_in[3] => data_out~10.DATAB
data_in[4] => data_out~9.DATAB
data_in[5] => data_out~8.DATAB
data_in[6] => data_out~7.DATAB
data_in[7] => data_out~6.DATAB
data_in[8] => data_out~5.DATAB
data_in[9] => data_out~4.DATAB
data_in[10] => data_out~3.DATAB
data_in[11] => data_out~2.DATAB
data_in[12] => data_out~1.DATAB
data_in[13] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[1] <= data_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[2] <= data_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[3] <= data_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[4] <= data_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[5] <= data_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[6] <= data_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[7] <= data_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[8] <= data_out[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[9] <= data_out[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[10] <= data_out[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[11] <= data_out[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[12] <= data_out[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[13] <= data_out[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ask_dem_real|fir_Q1:inst16|fir_Q1_new:fir_Q1_new_inst|fir_Q1_st:fir_core|tdl_da_lc:Utdldalc1n
clk => data_out[12]~reg0.CLK
clk => data_out[11]~reg0.CLK
clk => data_out[10]~reg0.CLK
clk => data_out[9]~reg0.CLK
clk => data_out[8]~reg0.CLK
clk => data_out[7]~reg0.CLK
clk => data_out[6]~reg0.CLK
clk => data_out[5]~reg0.CLK
clk => data_out[4]~reg0.CLK
clk => data_out[3]~reg0.CLK
clk => data_out[2]~reg0.CLK
clk => data_out[1]~reg0.CLK
clk => data_out[0]~reg0.CLK
clk => data_out[13]~reg0.CLK
rst => data_out~14.OUTPUTSELECT
rst => data_out~15.OUTPUTSELECT
rst => data_out~16.OUTPUTSELECT
rst => data_out~17.OUTPUTSELECT
rst => data_out~18.OUTPUTSELECT
rst => data_out~19.OUTPUTSELECT
rst => data_out~20.OUTPUTSELECT
rst => data_out~21.OUTPUTSELECT
rst => data_out~22.OUTPUTSELECT
rst => data_out~23.OUTPUTSELECT
rst => data_out~24.OUTPUTSELECT
rst => data_out~25.OUTPUTSELECT
rst => data_out~26.OUTPUTSELECT
rst => data_out~27.OUTPUTSELECT
clk_en => data_out~0.OUTPUTSELECT
clk_en => data_out~1.OUTPUTSELECT
clk_en => data_out~2.OUTPUTSELECT
clk_en => data_out~3.OUTPUTSELECT
clk_en => data_out~4.OUTPUTSELECT
clk_en => data_out~5.OUTPUTSELECT
clk_en => data_out~6.OUTPUTSELECT
clk_en => data_out~7.OUTPUTSELECT
clk_en => data_out~8.OUTPUTSELECT
clk_en => data_out~9.OUTPUTSELECT
clk_en => data_out~10.OUTPUTSELECT
clk_en => data_out~11.OUTPUTSELECT
clk_en => data_out~12.OUTPUTSELECT
clk_en => data_out~13.OUTPUTSELECT
data_in[0] => data_out~13.DATAB
data_in[1] => data_out~12.DATAB
data_in[2] => data_out~11.DATAB
data_in[3] => data_out~10.DATAB
data_in[4] => data_out~9.DATAB
data_in[5] => data_out~8.DATAB
data_in[6] => data_out~7.DATAB
data_in[7] => data_out~6.DATAB
data_in[8] => data_out~5.DATAB
data_in[9] => data_out~4.DATAB
data_in[10] => data_out~3.DATAB
data_in[11] => data_out~2.DATAB
data_in[12] => data_out~1.DATAB
data_in[13] => data_out~0.DATAB
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[1] <= data_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[2] <= data_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[3] <= data_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[4] <= data_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[5] <= data_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[6] <= data_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[7] <= data_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[8] <= data_out[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[9] <= data_out[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[10] <= data_out[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[11] <= data_out[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[12] <= data_out[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[13] <= data_out[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|ask_dem_real|fir_Q1:inst16|fir_Q1_new:fir_Q1_new_inst|fir_Q1_st:fir_core|tdl_da_lc:Utdldalc2n
clk => data_out[12]~reg0.CLK
clk => data_out[11]~reg0.CLK
clk => data_out[10]~reg0.CLK
clk => data_out[9]~reg0.CLK
clk => data_out[8]~reg0.CLK
clk => data_out[7]~reg0.CLK
clk => data_out[6]~reg0.CLK
clk => data_out[5]~reg0.CLK
clk => data_out[4]~reg0.CLK
clk => data_out[3]~reg0.CLK
clk => data_out[2]~reg0.CLK
clk => data_out[1]~reg0.CLK
clk => data_out[0]~reg0.CLK
clk => data_out[13]~reg0.CLK
rst => data_out~14.OUTPUTSELECT
rst => data_out~15.OUTPUTSELECT
rst => data_out~16.OUTPUTSELECT
rst => data_out~17.OUTPUTSELECT
rst => data_out~18.OUTPUTSELECT
rst => data_out~19.OUTPUTSELECT
rst => data_out~20.OUTPUTSELECT
rst => data_out~21.OUTPUTSELECT
rst => data_out~22.OUTPUTSELECT
rst => data_out~23.OUTPUTSELECT