ask_mod.fit.rpt

baseband基带调制编码

; Placement Effort Multiplier                            ; 1.0                            ; 1.0                            ;
; Router Effort Multiplier                               ; 1.0                            ; 1.0                            ;
; Optimize Hold Timing                                   ; IO Paths and Minimum TPD Paths ; IO Paths and Minimum TPD Paths ;
; Optimize Fast-Corner Timing                            ; Off                            ; Off                            ;
; PowerPlay Power Optimization                           ; Normal compilation             ; Normal compilation             ;
; Optimize Timing                                        ; Normal compilation             ; Normal compilation             ;
; Optimize IOC Register Placement for Timing             ; On                             ; On                             ;
; Limit to One Fitting Attempt                           ; Off                            ; Off                            ;
; Final Placement Optimizations                          ; Automatically                  ; Automatically                  ;
; Fitter Aggressive Routability Optimizations            ; Automatically                  ; Automatically                  ;
; Fitter Initial Placement Seed                          ; 1                              ; 1                              ;
; PCI I/O                                                ; Off                            ; Off                            ;
; Weak Pull-Up Resistor                                  ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                              ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                     ; Off                            ; Off                            ;
; Auto Packed Registers -- Stratix II/III/Cyclone II/III ; Auto                           ; Auto                           ;
; Auto Delay Chains                                      ; On                             ; On                             ;
; Auto Merge PLLs                                        ; On                             ; On                             ;
; Ignore PLL Mode When Merging PLLs                      ; Off                            ; Off                            ;
; Perform Physical Synthesis for Combinational Logic     ; Off                            ; Off                            ;
; Perform Register Duplication                           ; Off                            ; Off                            ;
; Perform Register Retiming                              ; Off                            ; Off                            ;
; Perform Asynchronous Signal Pipelining                 ; Off                            ; Off                            ;
; Fitter Effort                                          ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                        ; Normal                         ; Normal                         ;
; Auto Global Clock                                      ; On                             ; On                             ;
; Auto Global Register Control Signals                   ; On                             ; On                             ;
; Stop After Congestion Map Generation                   ; Off                            ; Off                            ;
; Use smart compilation                                  ; Off                            ; Off                            ;
+--------------------------------------------------------+--------------------------------+--------------------------------+


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in F:/program files/altera/61/qdesigns/my_work/ask_mod/ask_mod.pin.


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Usage Summary                                                                                                                           ;
+---------------------------------------------+-----------------------------------------------------------------------------------------------------------+
; Resource                                    ; Usage                                                                                                     ;
+---------------------------------------------+-----------------------------------------------------------------------------------------------------------+
; Total logic elements                        ; 1,789 / 33,216 ( 5 % )                                                                                    ;
;     -- Combinational with no register       ; 33                                                                                                        ;
;     -- Register only                        ; 583                                                                                                       ;
;     -- Combinational with a register        ; 1173                                                                                                      ;
;                                             ;                                                                                                           ;
; Logic element usage by number of LUT inputs ;                                                                                                           ;
;     -- 4 input functions                    ; 252                                                                                                       ;
;     -- 3 input functions                    ; 767                                                                                                       ;
;     -- <=2 input functions                  ; 187                                                                                                       ;
;     -- Register only                        ; 583                                                                                                       ;
;                                             ;                                                                                                           ;
; Logic elements by mode                      ;                                                                                                           ;
;     -- normal mode                          ; 522                                                                                                       ;
;     -- arithmetic mode                      ; 684                                                                                                       ;
;                                             ;                                                                                                           ;
; Total registers*                            ; 1,756 / 34,593 ( 5 % )                                                                                    ;
;     -- Dedicated logic registers            ; 1,756 / 33,216 ( 5 % )                                                                                    ;
;     -- I/O registers                        ; 0 / 1,377 ( 0 % )                                                                                         ;
;                                             ;                                                                                                           ;
; Total LABs:  partially or completely used   ; 118 / 2,076 ( 6 % )                                                                                       ;
; User inserted logic elements                ; 0                                                                                                         ;
; Virtual pins                                ; 0                                                                                                         ;
; I/O pins                                    ; 60 / 475 ( 13 % )                                                                                         ;
;     -- Clock pins                           ; 2 / 8 ( 25 % )                                                                                            ;
; Global signals                              ; 1                                                                                                         ;
; M4Ks                                        ; 53 / 105 ( 50 % )                                                                                         ;
; Total memory bits                           ; 213,104 / 483,840 ( 44 % )                                                                                ;
; Total RAM block bits                        ; 244,224 / 483,840 ( 50 % )                                                                                ;
; Embedded Multiplier 9-bit elements          ; 0 / 70 ( 0 % )                                                                                            ;
; PLLs                                        ; 0 / 4 ( 0 % )                                                                                             ;
; Global clocks                               ; 1 / 16 ( 6 % )                                                                                            ;
; Average interconnect usage                  ; 2%                                                                                                        ;
; Peak interconnect usage                     ; 14%                                                                                                       ;
; Maximum fan-out node                        ; clock~clkctrl                                                                                             ;
; Maximum fan-out                             ; 1809                                                                                                      ;
; Highest non-global fan-out signal           ; fir_ssb:inst3|fir_ssb_new:fir_ssb_new_inst|auk_dspip_avalon_streaming_controller:intf_ctrl|sink_stall_reg ;
; Highest non-global fan-out                  ; 1424                                                                                                      ;
; Total fan-out                               ; 9831                                                                                                      ;
; Average fan-out                             ; 2.84                                                                                                      ;
+---------------------------------------------+-----------------------------------------------------------------------------------------------------------+
*  Register count does not include registers inside RAM blocks or DSP blocks.