newboardconfig.qsf

cyclone II 208c8编写的 图像采集 显示程序。

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		newboardconfig_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C8Q208C8
set_global_assignment -name TOP_LEVEL_ENTITY newboardconfig
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:05:08  DECEMBER 17, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_location_assignment PIN_152 -to R8019en
set_location_assignment PIN_205 -to cen2
set_location_assignment PIN_203 -to cen3
set_location_assignment PIN_179 -to dspaddr[0]
set_location_assignment PIN_195 -to dspaddr[1]
set_location_assignment PIN_168 -to dspaddr[2]
set_location_assignment PIN_185 -to dspaddr[3]
set_location_assignment PIN_193 -to dspaddr[4]
set_location_assignment PIN_169 -to dspaddr[5]
set_location_assignment PIN_182 -to dspaddr[6]
set_location_assignment PIN_192 -to dspaddr[7]
set_location_assignment PIN_170 -to dspaddr[8]
set_location_assignment PIN_180 -to dspaddr[9]
set_location_assignment PIN_191 -to dspaddr[10]
set_location_assignment PIN_171 -to dspaddr[11]
set_location_assignment PIN_181 -to dspaddr[12]
set_location_assignment PIN_189 -to dspaddr[13]
set_location_assignment PIN_165 -to dspdata[0]
set_location_assignment PIN_197 -to dspdata[1]
set_location_assignment PIN_187 -to dspdata[2]
set_location_assignment PIN_176 -to dspdata[5]
set_location_assignment PIN_163 -to dspdata[6]
set_location_assignment PIN_199 -to dspdata[7]
set_location_assignment PIN_188 -to dspdata[8]
set_location_assignment PIN_162 -to dspdata[9]
set_location_assignment PIN_200 -to dspdata[10]
set_location_assignment PIN_175 -to dspdata[11]
set_location_assignment PIN_161 -to dspdata[12]
set_location_assignment PIN_201 -to dspdata[13]
set_location_assignment PIN_173 -to dspdata[14]
set_location_assignment PIN_160 -to dspdata[15]
set_location_assignment PIN_4 -to dspreset
set_location_assignment PIN_114 -to fifo1s[0]
set_location_assignment PIN_115 -to fifo1s[1]
set_location_assignment PIN_116 -to fifo1s[2]
set_location_assignment PIN_142 -to fifo2s[0]
set_location_assignment PIN_143 -to fifo2s[1]
set_location_assignment PIN_144 -to fifo2s[2]
set_location_assignment PIN_149 -to flashaddr[14]
set_location_assignment PIN_150 -to flashaddr[15]
set_location_assignment PIN_151 -to flashaddr[16]
set_location_assignment PIN_145 -to flashaddr[17]
set_location_assignment PIN_146 -to flashaddr[18]
set_location_assignment PIN_147 -to flashaddr[19]
set_location_assignment PIN_27 -to fpgaclk
set_location_assignment PIN_15 -to fpgareset
set_location_assignment PIN_6 -to gpio1
set_location_assignment PIN_8 -to gpio2
set_location_assignment PIN_14 -to gpio3
set_location_assignment PIN_13 -to gpio4
set_location_assignment PIN_5 -to gpio6
set_location_assignment PIN_206 -to dspready
set_location_assignment PIN_208 -to dspoe
set_location_assignment PIN_3 -to dspre
set_location_assignment PIN_207 -to dspwe
set_location_assignment PIN_164 -to dspdata[3]
set_location_assignment PIN_198 -to dspdata[4]
set_location_assignment PIN_10 -to int0
set_location_assignment PIN_11 -to int1
set_location_assignment PIN_12 -to int4
set_location_assignment PIN_95 -to fifo1data[0]
set_location_assignment PIN_96 -to fifo1data[1]
set_location_assignment PIN_97 -to fifo1data[2]
set_location_assignment PIN_99 -to fifo1data[3]
set_location_assignment PIN_101 -to fifo1data[4]
set_location_assignment PIN_102 -to fifo1data[5]
set_location_assignment PIN_103 -to fifo1data[6]
set_location_assignment PIN_104 -to fifo1data[7]
set_location_assignment PIN_107 -to fifo1oe
set_location_assignment PIN_113 -to fifo1rclk
set_location_assignment PIN_106 -to fifo1re
set_location_assignment PIN_110 -to fifo1rrst
set_location_assignment PIN_112 -to fifo1wclk
set_location_assignment PIN_105 -to fifo1we
set_location_assignment PIN_108 -to fifo1wrst
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_location_assignment PIN_30 -to fodd
set_location_assignment PIN_28 -to href
set_location_assignment PIN_31 -to vsyn
set_location_assignment PIN_39 -to hsyn
set_location_assignment PIN_35 -to cmosreset
set_location_assignment PIN_33 -to pwdn
set_location_assignment PIN_40 -to y[0]
set_location_assignment PIN_43 -to y[1]
set_location_assignment PIN_41 -to y[2]
set_location_assignment PIN_45 -to y[3]
set_location_assignment PIN_44 -to y[4]
set_location_assignment PIN_47 -to y[5]
set_location_assignment PIN_46 -to y[6]
set_location_assignment PIN_48 -to y[7]
set_location_assignment PIN_56 -to uv[0]
set_location_assignment PIN_58 -to uv[1]
set_location_assignment PIN_57 -to uv[2]
set_location_assignment PIN_60 -to uv[3]
set_location_assignment PIN_59 -to uv[4]
set_location_assignment PIN_63 -to uv[5]
set_location_assignment PIN_61 -to uv[6]
set_location_assignment PIN_64 -to uv[7]
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE stp2.stp
set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON
set_global_assignment -name SMART_RECOMPILE ON
set_location_assignment PIN_24 -to pclk
set_location_assignment PIN_67 -to vga_clk
set_location_assignment PIN_82 -to blank
set_location_assignment PIN_70 -to vga_hsyn
set_global_assignment -name IGNORE_CLOCK_SETTINGS ON
set_global_assignment -name FMAX_REQUIREMENT "60 MHz"
set_global_assignment -name VERILOG_FILE readfifo1.v
set_global_assignment -name BDF_FILE newboardconfig.bdf
set_global_assignment -name VERILOG_FILE pins.v
set_global_assignment -name VERILOG_FILE writefifo1.v
set_global_assignment -name VERILOG_FILE dsp.v
set_global_assignment -name VERILOG_FILE reset_gen.v
set_global_assignment -name VECTOR_WAVEFORM_FILE newboardconfig.vwf
set_global_assignment -name VERILOG_FILE resetcmos.v
set_global_assignment -name SIGNALTAP_FILE stp2.stp
set_global_assignment -name VERILOG_FILE clk_syn.v