stp3.stp

cyclone II 208c8编写的 图像采集 显示程序。

          <wire connection_status="true" name="writefifo1:writefifo11|uv[7]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[0]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[1]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[2]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[3]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[4]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[5]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[6]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[7]" tap_mode="classic" type="combinatorial"/>
        </trigger_input_vec>
        <data_input_vec>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[0]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[10]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[1]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[2]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[3]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[4]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[5]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[6]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[7]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[8]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|p_cnt[9]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[0]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[1]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[2]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[3]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[4]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[5]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[6]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|uv[7]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[0]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[1]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[2]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[3]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[4]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[5]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[6]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="writefifo1:writefifo11|y[7]" tap_mode="classic" type="combinatorial"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="writefifo1:writefifo11|p_cnt" order="msb_to_lsb" radix="unsigned_dec" state="collapse" type="register">
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[10]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[9]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[8]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[7]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[6]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[5]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[4]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[3]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[2]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[1]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="writefifo1:writefifo11|y" order="msb_to_lsb" radix="unsigned_dec" state="collapse" type="combinatorial">
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[7]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[6]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[5]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[4]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[3]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[2]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[1]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="writefifo1:writefifo11|uv" order="msb_to_lsb" radix="hex" state="collapse" type="combinatorial">
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[7]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[6]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[5]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[4]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[3]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[2]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[1]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[0]"/>
          </bus>
        </data_view>
        <setup_view>
          <bus is_signal_inverted="no" link="all" name="writefifo1:writefifo11|p_cnt" order="msb_to_lsb" radix="unsigned_dec" state="collapse" type="register">
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[10]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[9]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[8]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[7]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[6]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[5]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[4]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[3]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[2]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[1]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|p_cnt[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="writefifo1:writefifo11|y" order="msb_to_lsb" radix="unsigned_dec" state="collapse" type="combinatorial">
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[7]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[6]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[5]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[4]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[3]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[2]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[1]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|y[0]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="writefifo1:writefifo11|uv" order="msb_to_lsb" radix="hex" state="collapse" type="combinatorial">
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[7]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[6]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[5]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[4]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[3]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[2]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[1]"/>
            <net is_signal_inverted="no" name="writefifo1:writefifo11|uv[0]"/>
          </bus>
        </setup_view>
      </presentation>
      <trigger global_temp="1" is_expanded="true" name="trigger: 2008/01/02 19:03:47  #1" position="pre" segment_size="1" trigger_in="rising edge" trigger_out="active high" trigger_type="circular">
        <events>
          <level enabled="yes" type="basic">
            <op_node/>
          </level>
        </events>
      </trigger>
    </signal_set>
    <position_info>
      <single attribute="active tab" value="1"/>
      <single attribute="data horizontal scroll position" value="243"/>
      <single attribute="data vertical scroll position" value="0"/>
      <single attribute="setup horizontal scroll position" value="19"/>
      <single attribute="setup vertical scroll position" value="0"/>
      <single attribute="zoom level denominator" value="1"/>
      <single attribute="zoom level numerator" value="2"/>
      <single attribute="zoom offset denominator" value="1"/>
      <single attribute="zoom offset numerator" value="65472"/>
    </position_info>
  </instance>
  <mnemonics/>
  <global_info>
    <single attribute="active instance" value="0"/>
    <multi attribute="window position" size="9" value="989,424,398,124,356,50,85,0,1"/>
  </global_info>
</session>