📄 decode_4oa.tdf
字号:
--lpm_decode CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone II" LPM_DECODES=4 LPM_WIDTH=2 data enable eq
--VERSION_BEGIN 5.1 cbx_cycloneii 2005:08:30:10:31:44:SJ cbx_lpm_add_sub 2005:09:30:12:13:06:SJ cbx_lpm_compare 2005:07:12:04:41:28:SJ cbx_lpm_decode 2005:04:28:09:28:48:SJ cbx_mgl 2005:10:09:07:39:04:SJ cbx_stratix 2005:10:07:15:53:08:SJ cbx_stratixii 2005:07:27:05:50:56:SJ VERSION_END
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--synthesis_resources = lut 4
SUBDESIGN decode_4oa
(
data[1..0] : input;
enable : input;
eq[3..0] : output;
)
VARIABLE
data_wire[1..0] : WIRE;
enable_wire : WIRE;
eq_node[3..0] : WIRE;
eq_wire[3..0] : WIRE;
w_anode291w[2..0] : WIRE;
w_anode304w[2..0] : WIRE;
w_anode312w[2..0] : WIRE;
w_anode320w[2..0] : WIRE;
BEGIN
data_wire[] = data[];
enable_wire = enable;
eq[] = eq_node[];
eq_node[3..0] = eq_wire[3..0];
eq_wire[] = ( w_anode320w[2..2], w_anode312w[2..2], w_anode304w[2..2], w_anode291w[2..2]);
w_anode291w[] = ( (w_anode291w[1..1] & (! data_wire[1..1])), (w_anode291w[0..0] & (! data_wire[0..0])), enable_wire);
w_anode304w[] = ( (w_anode304w[1..1] & (! data_wire[1..1])), (w_anode304w[0..0] & data_wire[0..0]), enable_wire);
w_anode312w[] = ( (w_anode312w[1..1] & data_wire[1..1]), (w_anode312w[0..0] & (! data_wire[0..0])), enable_wire);
w_anode320w[] = ( (w_anode320w[1..1] & data_wire[1..1]), (w_anode320w[0..0] & data_wire[0..0]), enable_wire);
END;
--VALID FILE
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -