newboardconfig.map.eqn

cyclone II 208c8编写的 图像采集 显示程序。

dspdata[3] = INPUT();


--dspdata[2] is dspdata[2]
--operation mode is input

dspdata[2] = INPUT();


--dspdata[1] is dspdata[1]
--operation mode is input

dspdata[1] = INPUT();


--dspdata[0] is dspdata[0]
--operation mode is input

dspdata[0] = INPUT();


--fpgareset is fpgareset
--operation mode is input

fpgareset = INPUT();


--cen2 is cen2
--operation mode is input

cen2 = INPUT();


--dspaddr[6] is dspaddr[6]
--operation mode is input

dspaddr[6] = INPUT();


--dspaddr[9] is dspaddr[9]
--operation mode is input

dspaddr[9] = INPUT();


--dspaddr[10] is dspaddr[10]
--operation mode is input

dspaddr[10] = INPUT();


--dspaddr[8] is dspaddr[8]
--operation mode is input

dspaddr[8] = INPUT();


--dspaddr[13] is dspaddr[13]
--operation mode is input

dspaddr[13] = INPUT();


--dspaddr[12] is dspaddr[12]
--operation mode is input

dspaddr[12] = INPUT();


--dspaddr[7] is dspaddr[7]
--operation mode is input

dspaddr[7] = INPUT();


--dspaddr[11] is dspaddr[11]
--operation mode is input

dspaddr[11] = INPUT();


--dspaddr[3] is dspaddr[3]
--operation mode is input

dspaddr[3] = INPUT();


--dspaddr[4] is dspaddr[4]
--operation mode is input

dspaddr[4] = INPUT();


--dspaddr[5] is dspaddr[5]
--operation mode is input

dspaddr[5] = INPUT();


--dspaddr[2] is dspaddr[2]
--operation mode is input

dspaddr[2] = INPUT();


--dspoe is dspoe
--operation mode is input

dspoe = INPUT();


--dspaddr[1] is dspaddr[1]
--operation mode is input

dspaddr[1] = INPUT();


--dspre is dspre
--operation mode is input

dspre = INPUT();


--pclk is pclk
--operation mode is input

pclk = INPUT();


--fpgaclk is fpgaclk
--operation mode is input

fpgaclk = INPUT();


--fodd is fodd
--operation mode is input

fodd = INPUT();


--href is href
--operation mode is input

href = INPUT();


--hsyn is hsyn
--operation mode is input

hsyn = INPUT();


--vsyn is vsyn
--operation mode is input

vsyn = INPUT();


--R8019en is R8019en
--operation mode is output

R8019en = OUTPUT(!B1_R8019en);


--dspready is dspready
--operation mode is output

dspready = OUTPUT(VCC);


--fifo1we is fifo1we
--operation mode is output

fifo1we = OUTPUT(H1_fifo1we_reg);


--fifo1wrst is fifo1wrst
--operation mode is output

fifo1wrst = OUTPUT(H1_fifo1wrst_reg);


--cmosreset is cmosreset
--operation mode is output

cmosreset = OUTPUT(!K1_rst_cnt[17]);


--pwdn is pwdn
--operation mode is output

pwdn = OUTPUT(GND);


--fifo1re is fifo1re
--operation mode is output

fifo1re = OUTPUT(!B1L6);


--fifo1oe is fifo1oe
--operation mode is output

fifo1oe = OUTPUT(F1_fifo1oe);


--fifo1rrst is fifo1rrst
--operation mode is output

fifo1rrst = OUTPUT(!B1L7);


--fifo1rclk is fifo1rclk
--operation mode is output

fifo1rclk = OUTPUT(dspre);


--fifo1wclk is fifo1wclk
--operation mode is output

fifo1wclk = OUTPUT(D1_pclk_syn1);


--blank is blank
--operation mode is output

blank = OUTPUT(GND);


--vga_clk is vga_clk
--operation mode is output

vga_clk = OUTPUT(GND);


--vga_hsyn is vga_hsyn
--operation mode is output

vga_hsyn = OUTPUT(GND);


--fifo1data[7] is fifo1data[7]
--operation mode is output

fifo1data[7] = OUTPUT(H1_fifo1data[7]);


--fifo1data[6] is fifo1data[6]
--operation mode is output

fifo1data[6] = OUTPUT(H1_fifo1data[6]);


--fifo1data[5] is fifo1data[5]
--operation mode is output

fifo1data[5] = OUTPUT(H1_fifo1data[5]);


--fifo1data[4] is fifo1data[4]
--operation mode is output

fifo1data[4] = OUTPUT(H1_fifo1data[4]);


--fifo1data[3] is fifo1data[3]
--operation mode is output

fifo1data[3] = OUTPUT(H1_fifo1data[3]);


--fifo1data[2] is fifo1data[2]
--operation mode is output

fifo1data[2] = OUTPUT(H1_fifo1data[2]);


--fifo1data[1] is fifo1data[1]
--operation mode is output

fifo1data[1] = OUTPUT(H1_fifo1data[1]);


--fifo1data[0] is fifo1data[0]
--operation mode is output

fifo1data[0] = OUTPUT(H1_fifo1data[0]);


--fifo1s[2] is fifo1s[2]
--operation mode is output

fifo1s[2] = OUTPUT(OPNDRN(VCC));


--fifo1s[1] is fifo1s[1]
--operation mode is output

fifo1s[1] = OUTPUT(OPNDRN(VCC));


--fifo1s[0] is fifo1s[0]
--operation mode is output

fifo1s[0] = OUTPUT(OPNDRN(VCC));


--fifo2s[2] is fifo2s[2]
--operation mode is output

fifo2s[2] = OUTPUT(OPNDRN(VCC));


--fifo2s[1] is fifo2s[1]
--operation mode is output

fifo2s[1] = OUTPUT(OPNDRN(VCC));


--fifo2s[0] is fifo2s[0]
--operation mode is output

fifo2s[0] = OUTPUT(OPNDRN(VCC));


--flashaddr[19] is flashaddr[19]
--operation mode is output

flashaddr[19] = OUTPUT(GND);


--flashaddr[18] is flashaddr[18]
--operation mode is output

flashaddr[18] = OUTPUT(GND);


--flashaddr[17] is flashaddr[17]
--operation mode is output

flashaddr[17] = OUTPUT(GND);


--flashaddr[16] is flashaddr[16]
--operation mode is output

flashaddr[16] = OUTPUT(GND);


--flashaddr[15] is flashaddr[15]
--operation mode is output

flashaddr[15] = OUTPUT(GND);


--flashaddr[14] is flashaddr[14]
--operation mode is output

flashaddr[14] = OUTPUT(GND);


--uv[7] is uv[7]
--operation mode is bidir

uv[7] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--uv[6] is uv[6]
--operation mode is bidir

uv[6] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--uv[5] is uv[5]
--operation mode is bidir

uv[5] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--uv[4] is uv[4]
--operation mode is bidir

uv[4] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--uv[3] is uv[3]
--operation mode is bidir

uv[3] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--uv[2] is uv[2]
--operation mode is bidir

uv[2] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--uv[1] is uv[1]
--operation mode is bidir

uv[1] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--uv[0] is uv[0]
--operation mode is bidir

uv[0] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[7] is writefifo1:writefifo11|fifo1data[7]
--operation mode is bidir

H1_fifo1data[7] = y[7];

--y[7] is y[7]
--operation mode is bidir

y[7] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[6] is writefifo1:writefifo11|fifo1data[6]
--operation mode is bidir

H1_fifo1data[6] = y[6];

--y[6] is y[6]
--operation mode is bidir

y[6] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[5] is writefifo1:writefifo11|fifo1data[5]
--operation mode is bidir

H1_fifo1data[5] = y[5];

--y[5] is y[5]
--operation mode is bidir

y[5] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[4] is writefifo1:writefifo11|fifo1data[4]
--operation mode is bidir

H1_fifo1data[4] = y[4];

--y[4] is y[4]
--operation mode is bidir

y[4] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[3] is writefifo1:writefifo11|fifo1data[3]
--operation mode is bidir

H1_fifo1data[3] = y[3];

--y[3] is y[3]
--operation mode is bidir

y[3] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[2] is writefifo1:writefifo11|fifo1data[2]
--operation mode is bidir

H1_fifo1data[2] = y[2];

--y[2] is y[2]
--operation mode is bidir

y[2] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[1] is writefifo1:writefifo11|fifo1data[1]
--operation mode is bidir

H1_fifo1data[1] = y[1];

--y[1] is y[1]
--operation mode is bidir

y[1] = BIDIR(OPNDRN(K1_rst_cnt[17]));


--H1_fifo1data[0] is writefifo1:writefifo11|fifo1data[0]
--operation mode is bidir

H1_fifo1data[0] = y[0];

--y[0] is y[0]
--operation mode is bidir

y[0] = BIDIR(OPNDRN(K1_rst_cnt[17]));