work__info

This is version 1.4 of the MC8051 IP core.

Cmc8051_alu_struc_cfg
DE work dcml_adjust T5iLI=DbSY0;h6U::3Y6_0
DE work comb_divider N<RM69X`51JF<^OQdKkV;0
DE work comb_mltplr b<8<8?9SUdF8=ZVfE:N:R2
DE work addsub_core V:BUlCJPfXJ<hB:Z67F<Z0
DE work alucore JQca7:=9YUP4TJnWjG`o=3
DE work alumux PChdmEQ@hQCdb0W=m[:l60
DC work dcml_adjust_rtl_cfg zC]PjRGicjfKXkzCi6NVi1
DC work comb_divider_rtl_cfg zjUaGz83mejnb_PGVmCcD1
DC work comb_mltplr_rtl_cfg `3>@@M3<PXGzhl^L>BQ4;2
DC work addsub_core_struc_cfg nDBzjFeG7H]_MK3cH0=FX0
DC work alucore_rtl_cfg DbB1=AioMzgI1P0HgI5BV2
DC work alumux_rtl_cfg fJY6RH1QkZV<ZOz5HL`T[3
DA work mc8051_alu struc RCZ7[IMBBH56XFl4FmFYP0
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_alu IW;jNCiC`O:WYZI>E2?]E2
32
M3 ieee std_logic_1164
M2 ieee std_logic_arith
M1 work mc8051_p
astruc
emc8051_alu
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dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_alu_struc_cfg.vhd
l0
L67
VQcm=3SG@K1HEL;AGPi>nC3
OE;C;6.2b;35
tExplicit 1
Emc8051_control
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DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_control_.vhd
l0
L74
V>D69lcaKTZX8U;;12R1cO0
OE;C;6.2b;35
tExplicit 1
Astruc
DE work control_mem 2;5IIK760Nhj5h1NajMaW1
DE work control_fsm U`Y:W^E5^2JSXDf`T^UX`2
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_control >D69lcaKTZX8U;;12R1cO0
32
M3 ieee std_logic_1164
M2 ieee std_logic_arith
M1 work mc8051_p
F../vhdl/mc8051_control_struc.vhd
l117
L66
VC<aA8D89h;b1W7<X=T0;h0
OE;C;6.2b;35
tExplicit 1
Cmc8051_control_struc_cfg
DE work control_mem 2;5IIK760Nhj5h1NajMaW1
DE work control_fsm U`Y:W^E5^2JSXDf`T^UX`2
DC work control_mem_rtl_cfg QI1OT^HPG4bOe_W>84_KM0
DC work control_fsm_rtl_cfg LW7k20K`6oLhMjAXO3d<S2
DA work mc8051_control struc C<aA8D89h;b1W7<X=T0;h0
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_control >D69lcaKTZX8U;;12R1cO0
32
M3 ieee std_logic_1164
M2 ieee std_logic_arith
M1 work mc8051_p
astruc
emc8051_control
w1175220390
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_control_struc_cfg.vhd
l0
L66
V<DcKNze7N07e=ohb3oSm@3
OE;C;6.2b;35
tExplicit 1
Emc8051_core
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DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_core_.vhd
l0
L75
VbUJ>m:i93Pezb20be3``_3
OE;C;6.2b;35
tExplicit 1
Astruc
DE work mc8051_tmrctr ZjN9Pb@X[SYQSV3AD4PdI2
DE work mc8051_siu ]B5>:]X27_m1l4HP`I:D>2
DE work mc8051_alu IW;jNCiC`O:WYZI>E2?]E2
DE work mc8051_control >D69lcaKTZX8U;;12R1cO0
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_core bUJ>m:i93Pezb20be3``_3
32
M3 ieee std_logic_1164
M2 ieee std_logic_arith
M1 work mc8051_p
F../vhdl/mc8051_core_struc.vhd
l107
L67
V@6:<1Fdh=P83USQb]B[<20
OE;C;6.2b;35
tExplicit 1
Cmc8051_core_struc_cfg
DE work mc8051_tmrctr ZjN9Pb@X[SYQSV3AD4PdI2
DE work mc8051_siu ]B5>:]X27_m1l4HP`I:D>2
DE work mc8051_alu IW;jNCiC`O:WYZI>E2?]E2
DE work mc8051_control >D69lcaKTZX8U;;12R1cO0
DC work mc8051_tmrctr_rtl_cfg @Hne[SAU2F<iGNiIYIU0z2
DC work mc8051_siu_rtl_cfg BjFA^2>H1mNKn4ADG3Rl=3
DC work mc8051_alu_struc_cfg Qcm=3SG@K1HEL;AGPi>nC3
DC work mc8051_control_struc_cfg <DcKNze7N07e=ohb3oSm@3
DA work mc8051_core struc @6:<1Fdh=P83USQb]B[<20
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_core bUJ>m:i93Pezb20be3``_3
32
M3 ieee std_logic_1164
M2 ieee std_logic_arith
M1 work mc8051_p
astruc
emc8051_core
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dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_core_struc_cfg.vhd
l0
L67
VUKAbfaT@7z^CSkUjcbWi70
OE;C;6.2b;35
tExplicit 1
Pmc8051_p
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
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dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_p.vhd
l0
L69
VD@ajnA8l=^ZmQbE]9UbS23
OE;C;6.2b;35
tExplicit 1
Emc8051_ram
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DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../tb/mc8051_ram_.vhd
l0
L69
VLHhk=[IT39[9H8ddMa=Ie0
OE;C;6.2b;35
tExplicit 1
Asim
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_ram LHhk=[IT39[9H8ddMa=Ie0
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
F../tb/mc8051_ram_sim.vhd
l72
L65
Vk^B:gSK1U_9a1@YUmJ66e1
OE;C;6.2b;35
tExplicit 1
Cmc8051_ram_sim_cfg
DA work mc8051_ram sim k^B:gSK1U_9a1@YUmJ66e1
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_ram LHhk=[IT39[9H8ddMa=Ie0
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
asim
emc8051_ram
w1175220416
dG:\mc8051_design\mc8051_design\msim
F../tb/mc8051_ram_sim_cfg.vhd
l0
L65
VXcWMm>d3:2A]XkUJjZEFK2
OE;C;6.2b;35
tExplicit 1
Emc8051_ramx
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DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../tb/mc8051_ramx_.vhd
l0
L70
V;0AcV>=aME8iE1ESTFhW[2
OE;C;6.2b;35
tExplicit 1
Asim
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_ramx ;0AcV>=aME8iE1ESTFhW[2
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
F../tb/mc8051_ramx_sim.vhd
l69
L65
VMk;>@=EkJgZoiHL[3Z5PO1
OE;C;6.2b;35
tExplicit 1
Cmc8051_ramx_sim_cfg
DA work mc8051_ramx sim Mk;>@=EkJgZoiHL[3Z5PO1
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_ramx ;0AcV>=aME8iE1ESTFhW[2
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
asim
emc8051_ramx
w1175220416
dG:\mc8051_design\mc8051_design\msim
F../tb/mc8051_ramx_sim_cfg.vhd
l0
L65
Vmf94?QZk1<ia4<nZAX63X0
OE;C;6.2b;35
tExplicit 1
Emc8051_rom
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DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../tb/mc8051_rom_.vhd
l0
L73
VoiIo4J_R1?GAI]mC1eil03
OE;C;6.2b;35
tExplicit 1
Asim
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_rom oiIo4J_R1?GAI]mC1eil03
32
M4 ieee std_logic_1164
M3 ieee std_logic_arith
M2 ieee std_logic_textio
M1 std textio
F../tb/mc8051_rom_sim.vhd
l70
L65
VLz6KA]?Fi2MiCB>DDRk6S1
OE;C;6.2b;35
tExplicit 1
Cmc8051_rom_sim_cfg
DA work mc8051_rom sim Lz6KA]?Fi2MiCB>DDRk6S1
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_rom oiIo4J_R1?GAI]mC1eil03
32
M4 ieee std_logic_1164
M3 ieee std_logic_arith
M2 ieee std_logic_textio
M1 std textio
asim
emc8051_rom
w1175220416
dG:\mc8051_design\mc8051_design\msim
F../tb/mc8051_rom_sim_cfg.vhd
l0
L65
V3;RCYm@4ZR_FO1nAXMHQg1
OE;C;6.2b;35
tExplicit 1
Emc8051_siu
w1175220390
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_siu_.vhd
l0
L71
V]B5>:]X27_m1l4HP`I:D>2
OE;C;6.2b;35
tExplicit 1
Artl
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_siu ]B5>:]X27_m1l4HP`I:D>2
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
F../vhdl/mc8051_siu_rtl.vhd
l105
L65
VDMX3I9?PeE;@lE=6DCS752
OE;C;6.2b;35
tExplicit 1
Cmc8051_siu_rtl_cfg
DA work mc8051_siu rtl DMX3I9?PeE;@lE=6DCS752
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_siu ]B5>:]X27_m1l4HP`I:D>2
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
artl
emc8051_siu
w1175220390
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_siu_rtl_cfg.vhd
l0
L65
VBjFA^2>H1mNKn4ADG3Rl=3
OE;C;6.2b;35
tExplicit 1
Emc8051_tmrctr
w1175220390
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_tmrctr_.vhd
l0
L71
VZjN9Pb@X[SYQSV3AD4PdI2
OE;C;6.2b;35
tExplicit 1
Artl
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_tmrctr ZjN9Pb@X[SYQSV3AD4PdI2
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
F../vhdl/mc8051_tmrctr_rtl.vhd
l100
L65
VYG4k7WUQ:F<RbDX:zF:jV2
OE;C;6.2b;35
tExplicit 1
Cmc8051_tmrctr_rtl_cfg
DA work mc8051_tmrctr rtl YG4k7WUQ:F<RbDX:zF:jV2
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_tmrctr ZjN9Pb@X[SYQSV3AD4PdI2
32
M2 ieee std_logic_1164
M1 ieee std_logic_arith
artl
emc8051_tmrctr
w1175220390
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_tmrctr_rtl_cfg.vhd
l0
L65
V@Hne[SAU2F<iGNiIYIU0z2
OE;C;6.2b;35
tExplicit 1
Emc8051_top
w1175220390
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_top_.vhd
l0
L74
VE8PcgeRQ1@X^dY913YFLa3
OE;C;6.2b;35
tExplicit 1
Astruc
DE work mc8051_ramx ;0AcV>=aME8iE1ESTFhW[2
DE work mc8051_rom oiIo4J_R1?GAI]mC1eil03
DE work mc8051_ram LHhk=[IT39[9H8ddMa=Ie0
DE work mc8051_core bUJ>m:i93Pezb20be3``_3
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_top E8PcgeRQ1@X^dY913YFLa3
32
M3 ieee std_logic_1164
M2 ieee std_logic_arith
M1 work mc8051_p
F../vhdl/mc8051_top_struc.vhd
l88
L66
VZWmblRf^OzM?c3gUY[@Q31
OE;C;6.2b;35
tExplicit 1
Cmc8051_top_struc_cfg
DE work mc8051_ramx ;0AcV>=aME8iE1ESTFhW[2
DE work mc8051_rom oiIo4J_R1?GAI]mC1eil03
DE work mc8051_ram LHhk=[IT39[9H8ddMa=Ie0
DE work mc8051_core bUJ>m:i93Pezb20be3``_3
DC work mc8051_ramx_sim_cfg mf94?QZk1<ia4<nZAX63X0
DC work mc8051_ram_sim_cfg XcWMm>d3:2A]XkUJjZEFK2
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DC work mc8051_rom_sim_cfg 3;RCYm@4ZR_FO1nAXMHQg1
DC work mc8051_core_struc_cfg UKAbfaT@7z^CSkUjcbWi70
DA work mc8051_top struc ZWmblRf^OzM?c3gUY[@Q31
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work mc8051_top E8PcgeRQ1@X^dY913YFLa3
32
M5 ieee std_logic_1164
M4 ieee std_logic_arith
M3 work mc8051_p
M2 ieee std_logic_textio
M1 std textio
astruc
emc8051_top
w1175220390
dG:\mc8051_design\mc8051_design\msim
F../vhdl/mc8051_top_struc_cfg.vhd
l0
L66
VNcRA@?BQ9hV?FkP=^F27U3
OE;C;6.2b;35
tExplicit 1
Etb_mc8051_top
w1175220418
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
32
dG:\mc8051_design\mc8051_design\msim
F../tb/tb_mc8051_top_.vhd
l0
L73
V=fO@NC1@?0>b>T3UZe^M40
OE;C;6.2b;35
tExplicit 1
Asim
DE work mc8051_top E8PcgeRQ1@X^dY913YFLa3
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work tb_mc8051_top =fO@NC1@?0>b>T3UZe^M40
32
M3 ieee std_logic_1164
M2 ieee std_logic_arith
M1 work mc8051_p
F../tb/tb_mc8051_top_sim.vhd
l118
L66
VdKlnFLjGiafTD7SZ?M[XV3
OE;C;6.2b;35
tExplicit 1
Ctb_mc8051_top_sim_cfg
DE work mc8051_top E8PcgeRQ1@X^dY913YFLa3
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DC work mc8051_top_struc_cfg NcRA@?BQ9hV?FkP=^F27U3
DA work tb_mc8051_top sim dKlnFLjGiafTD7SZ?M[XV3
DP work mc8051_p D@ajnA8l=^ZmQbE]9UbS23
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work tb_mc8051_top =fO@NC1@?0>b>T3UZe^M40
32
M5 ieee std_logic_1164
M4 ieee std_logic_arith
M3 work mc8051_p
M2 ieee std_logic_textio
M1 std textio
asim
etb_mc8051_top
w1175220418
dG:\mc8051_design\mc8051_design\msim
F../tb/tb_mc8051_top_sim_cfg.vhd
l0
L66
V@V:^;NcD2QDU^Sa_iZU]=0
OE;C;6.2b;35
tExplicit 1