uart_top.smp_dump.txt

URAT异步通信接口的VHDL描述

State Machine - |Uart_top|Txmitt:U4|Tx_State
Name Tx_State.stop_halfbit Tx_State.stop_2bit Tx_State.stop_1bit Tx_State.parity Tx_State.shift Tx_State.start 
Tx_State.start 0 0 0 0 0 0 
Tx_State.shift 0 0 0 0 1 1 
Tx_State.parity 0 0 0 1 0 1 
Tx_State.stop_1bit 0 0 1 0 0 1 
Tx_State.stop_2bit 0 1 0 0 0 1 
Tx_State.stop_halfbit 1 0 0 0 0 1 

State Machine - |Uart_top|Rxcver:U3|Rx_State
Name Rx_State.stop Rx_State.parity Rx_State.shift Rx_State.idle 
Rx_State.idle 0 0 0 0 
Rx_State.shift 0 0 1 1 
Rx_State.parity 0 1 0 1 
Rx_State.stop 1 0 0 1 

State Machine - |Uart_top|Intface:U1|Int_State
Name Int_State.int3 Int_State.int2 Int_State.int1 Int_State.int0 Int_State.idle 
Int_State.idle 0 0 0 0 0 
Int_State.int0 0 0 0 1 1 
Int_State.int1 0 0 1 0 1 
Int_State.int2 0 1 0 0 1 
Int_State.int3 1 0 0 0 1