sin_wave.fit.qmsg

sin波形信号发生起的程序 VHDL语言描述 QUartus

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 30 15:14:55 2008 " "Info: Processing started: Sun Mar 30 15:14:55 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off sin_wave -c sin_wave " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off sin_wave -c sin_wave" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "sin_wave EP1C3T100C6 " "Info: Automatically selected device EP1C3T100C6 for design sin_wave" {  } {  } 0 0 "Automatically selected device %2!s! for design %1!s!" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" {  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0}
{ "Info" "IFIOMGR_PINS_MISSING_LOCATION_INFO" "14 14 " "Info: No exact pin location assignment(s) for 14 pins of 14 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[0\] " "Info: Pin wave_out\[0\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[0\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[0] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[1\] " "Info: Pin wave_out\[1\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[1\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[1] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[2\] " "Info: Pin wave_out\[2\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[2\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[2] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[3\] " "Info: Pin wave_out\[3\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[3\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[3] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[4\] " "Info: Pin wave_out\[4\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[4\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[4] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[5\] " "Info: Pin wave_out\[5\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[5\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[5] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[6\] " "Info: Pin wave_out\[6\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[6\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[6] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[7\] " "Info: Pin wave_out\[7\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[7\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[7] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[8\] " "Info: Pin wave_out\[8\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[8\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[8] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[8] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[9\] " "Info: Pin wave_out\[9\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[9\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[9] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[9] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wave_out\[10\] " "Info: Pin wave_out\[10\] not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 12 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "wave_out\[10\]" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[10] } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { wave_out[10] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "enable " "Info: Pin enable not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 11 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "enable" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { enable } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { enable } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clock " "Info: Pin clock not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 11 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "clock" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { clock } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { clock } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "reset " "Info: Pin reset not assigned to an exact location on the device" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 11 -1 0 } } { "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" "" { Assignment "d:/edatool/altera/quartus6.0/win/Assignment Editor.qase" 1 { { 0 "reset" } } } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { reset } "NODE_NAME" } } { "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/edatool/altera/quartus6.0/win/TimingClosureFloorplan.fld" "" "" { reset } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0}
{ "Info" "ITAN_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." {  } {  } 0 0 "Timing requirements not specified -- quality metrics such as performance and power consumption may be sacrificed to reduce compilation time." 0 0}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 1 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 1 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources" {  } {  } 0 0 "DQS I/O pins require %1!d! global routing resources" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clock Global clock in PIN 10 " "Info: Automatically promoted signal \"clock\" to use Global clock in PIN 10" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 11 -1 0 } }  } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "reset Global clock in PIN 66 " "Info: Automatically promoted signal \"reset\" to use Global clock in PIN 66" {  } { { "sin_wave.vhd" "" { Text "D:/EDAtool/altera/Design_ok/Sinwave generator/sin_wave.vhd" 11 -1 0 } }  } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Extra Info: Finished Fast Input/Output/OE register processing" {  } {  } 1 0 "Finished Fast Input/Output/OE register processing" 1 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0 0 "Fitter is using %2!s! packing mode for logic elements with %1!s! setting for Auto Packed Registers logic option" 0 0}
{ "Extra Info" "IFSAC_FSAC_START_LUT_IO_RAM_PACKING" "" "Extra Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" {  } {  } 1 0 "Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" 1 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0 0 "Finished moving registers into I/O cells, LUTs, and RAM blocks" 0 0}