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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--C1_dig_r[7] is key_led:inst1|dig_r[7]
--operation mode is normal

C1_dig_r[7]_lut_out = C1_cnt3[0] # C1_cnt3[2] # C1_cnt3[1];
C1_dig_r[7] = DFFEAS(C1_dig_r[7]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dig_r[6] is key_led:inst1|dig_r[6]
--operation mode is normal

C1_dig_r[6]_lut_out = C1_cnt3[2] # C1_cnt3[1] # !C1_cnt3[0];
C1_dig_r[6] = DFFEAS(C1_dig_r[6]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dig_r[5] is key_led:inst1|dig_r[5]
--operation mode is normal

C1_dig_r[5]_lut_out = C1_cnt3[0] # C1_cnt3[2] # !C1_cnt3[1];
C1_dig_r[5] = DFFEAS(C1_dig_r[5]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dig_r[4] is key_led:inst1|dig_r[4]
--operation mode is normal

C1_dig_r[4]_lut_out = C1_cnt3[2] # !C1_cnt3[1] # !C1_cnt3[0];
C1_dig_r[4] = DFFEAS(C1_dig_r[4]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dig_r[3] is key_led:inst1|dig_r[3]
--operation mode is normal

C1_dig_r[3]_lut_out = C1_cnt3[0] # C1_cnt3[1] # !C1_cnt3[2];
C1_dig_r[3] = DFFEAS(C1_dig_r[3]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dig_r[2] is key_led:inst1|dig_r[2]
--operation mode is normal

C1_dig_r[2]_lut_out = C1_cnt3[1] # !C1_cnt3[2] # !C1_cnt3[0];
C1_dig_r[2] = DFFEAS(C1_dig_r[2]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dig_r[1] is key_led:inst1|dig_r[1]
--operation mode is normal

C1_dig_r[1]_lut_out = C1_cnt3[0] # !C1_cnt3[1] # !C1_cnt3[2];
C1_dig_r[1] = DFFEAS(C1_dig_r[1]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dig_r[0] is key_led:inst1|dig_r[0]
--operation mode is normal

C1_dig_r[0]_lut_out = !C1_cnt3[1] # !C1_cnt3[2] # !C1_cnt3[0];
C1_dig_r[0] = DFFEAS(C1_dig_r[0]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_bin_r[3] is key_led:inst1|bin_r[3]
--operation mode is normal

C1_bin_r[3]_lut_out = !C1_bin_r[3];
C1_bin_r[3] = DFFEAS(C1_bin_r[3]_lut_out, clock_48M, VCC, , C1_key_edge[7], , , , );


--C1_bin_r[2] is key_led:inst1|bin_r[2]
--operation mode is normal

C1_bin_r[2]_lut_out = !C1_bin_r[2];
C1_bin_r[2] = DFFEAS(C1_bin_r[2]_lut_out, clock_48M, VCC, , C1_key_edge[6], , , , );


--C1_bin_r[1] is key_led:inst1|bin_r[1]
--operation mode is normal

C1_bin_r[1]_lut_out = !C1_bin_r[1];
C1_bin_r[1] = DFFEAS(C1_bin_r[1]_lut_out, clock_48M, VCC, , C1_key_edge[5], , , , );


--C1_bin_r[0] is key_led:inst1|bin_r[0]
--operation mode is normal

C1_bin_r[0]_lut_out = !C1_bin_r[0];
C1_bin_r[0] = DFFEAS(C1_bin_r[0]_lut_out, clock_48M, VCC, , C1_key_edge[4], , , , );


--C1_disp_dat[0] is key_led:inst1|disp_dat[0]
--operation mode is normal

C1_disp_dat[0]_lut_out = C1_cnt3[2] & C1L041 # !C1_cnt3[2] & (C1L241);
C1_disp_dat[0] = DFFEAS(C1_disp_dat[0]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_disp_dat[1] is key_led:inst1|disp_dat[1]
--operation mode is normal

C1_disp_dat[1]_lut_out = C1_cnt3[1] & C1L441 # !C1_cnt3[1] & (C1L541 & !C1_cnt3[2]);
C1_disp_dat[1] = DFFEAS(C1_disp_dat[1]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_disp_dat[2] is key_led:inst1|disp_dat[2]
--operation mode is normal

C1_disp_dat[2]_lut_out = C1_cnt3[1] & C1L741 # !C1_cnt3[1] & (C1L841 & !C1_cnt3[2]);
C1_disp_dat[2] = DFFEAS(C1_disp_dat[2]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_disp_dat[3] is key_led:inst1|disp_dat[3]
--operation mode is normal

C1_disp_dat[3]_lut_out = C1_cnt3[1] & C1L051 # !C1_cnt3[1] & (C1L151 & !C1_cnt3[2]);
C1_disp_dat[3] = DFFEAS(C1_disp_dat[3]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1L851 is key_led:inst1|seg[6]~103
--operation mode is normal

C1L851 = C1_disp_dat[0] & (C1_disp_dat[3] # C1_disp_dat[1] $ C1_disp_dat[2]) # !C1_disp_dat[0] & (C1_disp_dat[1] # C1_disp_dat[2] $ C1_disp_dat[3]);


--C1L751 is key_led:inst1|seg[5]~104
--operation mode is normal

C1L751 = C1_disp_dat[0] & (C1_disp_dat[3] $ (C1_disp_dat[1] # !C1_disp_dat[2])) # !C1_disp_dat[0] & C1_disp_dat[1] & !C1_disp_dat[2] & !C1_disp_dat[3];


--C1L651 is key_led:inst1|seg[4]~105
--operation mode is normal

C1L651 = C1_disp_dat[1] & C1_disp_dat[0] & (!C1_disp_dat[3]) # !C1_disp_dat[1] & (C1_disp_dat[2] & (!C1_disp_dat[3]) # !C1_disp_dat[2] & C1_disp_dat[0]);


--C1L551 is key_led:inst1|seg[3]~106
--operation mode is normal

C1L551 = C1_disp_dat[1] & (C1_disp_dat[0] & C1_disp_dat[2] # !C1_disp_dat[0] & !C1_disp_dat[2] & C1_disp_dat[3]) # !C1_disp_dat[1] & !C1_disp_dat[3] & (C1_disp_dat[0] $ C1_disp_dat[2]);


--C1L451 is key_led:inst1|seg[2]~107
--operation mode is normal

C1L451 = C1_disp_dat[2] & C1_disp_dat[3] & (C1_disp_dat[1] # !C1_disp_dat[0]) # !C1_disp_dat[2] & !C1_disp_dat[0] & C1_disp_dat[1] & !C1_disp_dat[3];


--C1L351 is key_led:inst1|seg[1]~108
--operation mode is normal

C1L351 = C1_disp_dat[1] & (C1_disp_dat[0] & (C1_disp_dat[3]) # !C1_disp_dat[0] & C1_disp_dat[2]) # !C1_disp_dat[1] & C1_disp_dat[2] & (C1_disp_dat[0] $ C1_disp_dat[3]);


--C1L251 is key_led:inst1|seg[0]~109
--operation mode is normal

C1L251 = C1_disp_dat[2] & !C1_disp_dat[1] & (C1_disp_dat[0] $ !C1_disp_dat[3]) # !C1_disp_dat[2] & C1_disp_dat[0] & (C1_disp_dat[1] $ !C1_disp_dat[3]);


--C1_cnt3[0] is key_led:inst1|cnt3[0]
--operation mode is normal

C1_cnt3[0]_lut_out = !C1_cnt3[0];
C1_cnt3[0] = DFFEAS(C1_cnt3[0]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_cnt3[2] is key_led:inst1|cnt3[2]
--operation mode is normal

C1_cnt3[2]_lut_out = !C1_cnt3[2];
C1_cnt3[2] = DFFEAS(C1_cnt3[2]_lut_out, clock_48M, VCC, , C1L02, , , , );


--C1_cnt3[1] is key_led:inst1|cnt3[1]
--operation mode is normal

C1_cnt3[1]_lut_out = !C1_cnt3[1];
C1_cnt3[1] = DFFEAS(C1_cnt3[1]_lut_out, clock_48M, VCC, , C1L81, , , , );


--C1_div_clk is key_led:inst1|div_clk
--operation mode is normal

C1_div_clk_lut_out = C1L831;
C1_div_clk = DFFEAS(C1_div_clk_lut_out, clock_48M, VCC, , , , , , );


--C1_buff[7] is key_led:inst1|buff[7]
--operation mode is normal

C1_buff[7]_lut_out = C1_dout3[7] # C1_dout1[7] # C1_dout2[7];
C1_buff[7] = DFFEAS(C1_buff[7]_lut_out, clock_48M, VCC, , , , , , );


--C1_dout3[7] is key_led:inst1|dout3[7]
--operation mode is normal

C1_dout3[7]_lut_out = C1_dout2[7];
C1_dout3[7] = DFFEAS(C1_dout3[7]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout1[7] is key_led:inst1|dout1[7]
--operation mode is normal

C1_dout1[7]_lut_out = key[7];
C1_dout1[7] = DFFEAS(C1_dout1[7]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout2[7] is key_led:inst1|dout2[7]
--operation mode is normal

C1_dout2[7]_lut_out = C1_dout1[7];
C1_dout2[7] = DFFEAS(C1_dout2[7]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_key_edge[7] is key_led:inst1|key_edge[7]
--operation mode is normal

C1_key_edge[7] = C1_buff[7] & !C1_dout3[7] & !C1_dout1[7] & !C1_dout2[7];


--C1_buff[6] is key_led:inst1|buff[6]
--operation mode is normal

C1_buff[6]_lut_out = C1_dout3[6] # C1_dout1[6] # C1_dout2[6];
C1_buff[6] = DFFEAS(C1_buff[6]_lut_out, clock_48M, VCC, , , , , , );


--C1_dout3[6] is key_led:inst1|dout3[6]
--operation mode is normal

C1_dout3[6]_lut_out = C1_dout2[6];
C1_dout3[6] = DFFEAS(C1_dout3[6]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout1[6] is key_led:inst1|dout1[6]
--operation mode is normal

C1_dout1[6]_lut_out = key[6];
C1_dout1[6] = DFFEAS(C1_dout1[6]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout2[6] is key_led:inst1|dout2[6]
--operation mode is normal

C1_dout2[6]_lut_out = C1_dout1[6];
C1_dout2[6] = DFFEAS(C1_dout2[6]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_key_edge[6] is key_led:inst1|key_edge[6]
--operation mode is normal

C1_key_edge[6] = C1_buff[6] & !C1_dout3[6] & !C1_dout1[6] & !C1_dout2[6];


--C1_buff[5] is key_led:inst1|buff[5]
--operation mode is normal

C1_buff[5]_lut_out = C1_dout3[5] # C1_dout1[5] # C1_dout2[5];
C1_buff[5] = DFFEAS(C1_buff[5]_lut_out, clock_48M, VCC, , , , , , );


--C1_dout3[5] is key_led:inst1|dout3[5]
--operation mode is normal

C1_dout3[5]_lut_out = C1_dout2[5];
C1_dout3[5] = DFFEAS(C1_dout3[5]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout1[5] is key_led:inst1|dout1[5]
--operation mode is normal

C1_dout1[5]_lut_out = key[5];
C1_dout1[5] = DFFEAS(C1_dout1[5]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout2[5] is key_led:inst1|dout2[5]
--operation mode is normal

C1_dout2[5]_lut_out = C1_dout1[5];
C1_dout2[5] = DFFEAS(C1_dout2[5]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_key_edge[5] is key_led:inst1|key_edge[5]
--operation mode is normal

C1_key_edge[5] = C1_buff[5] & !C1_dout3[5] & !C1_dout1[5] & !C1_dout2[5];


--C1_buff[4] is key_led:inst1|buff[4]
--operation mode is normal

C1_buff[4]_lut_out = C1_dout3[4] # C1_dout1[4] # C1_dout2[4];
C1_buff[4] = DFFEAS(C1_buff[4]_lut_out, clock_48M, VCC, , , , , , );


--C1_dout3[4] is key_led:inst1|dout3[4]
--operation mode is normal

C1_dout3[4]_lut_out = C1_dout2[4];
C1_dout3[4] = DFFEAS(C1_dout3[4]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout1[4] is key_led:inst1|dout1[4]
--operation mode is normal

C1_dout1[4]_lut_out = key[4];
C1_dout1[4] = DFFEAS(C1_dout1[4]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_dout2[4] is key_led:inst1|dout2[4]
--operation mode is normal

C1_dout2[4]_lut_out = C1_dout1[4];
C1_dout2[4] = DFFEAS(C1_dout2[4]_lut_out, clock_48M, VCC, , C1_div_clk, , , , );


--C1_key_edge[4] is key_led:inst1|key_edge[4]
--operation mode is normal

C1_key_edge[4] = C1_buff[4] & !C1_dout3[4] & !C1_dout1[4] & !C1_dout2[4];


--B1L1 is adder8:inst|add~237
--operation mode is arithmetic

B1L1_carry_eqn = B1L91;
B1L1 = C1_hex_r[0] $ C1_hex_r[8] $ B1L1_carry_eqn;

--B1L2 is adder8:inst|add~239
--operation mode is arithmetic

B1L2 = CARRY(C1_hex_r[0] & !C1_hex_r[8] & !B1L91 # !C1_hex_r[0] & (!B1L91 # !C1_hex_r[8]));


--B1L3 is adder8:inst|add~242
--operation mode is normal

B1L3_carry_eqn = B1L51;
B1L3 = B1L3_carry_eqn;


--C1L931 is key_led:inst1|Mux~1014
--operation mode is normal

C1L931 = C1_cnt3[1] & B1L1 # !C1_cnt3[1] & (B1L3);


--B1L4 is adder8:inst|add~247
--operation mode is arithmetic

B1L4_carry_eqn = B1L71;
B1L4 = C1_hex_r[4] $ C1_hex_r[12] $ B1L4_carry_eqn;

--B1L5 is adder8:inst|add~249
--operation mode is arithmetic

B1L5 = CARRY(C1_hex_r[4] & !C1_hex_r[12] & !B1L71 # !C1_hex_r[4] & (!B1L71 # !C1_hex_r[12]));


--C1L041 is key_led:inst1|Mux~1015
--operation mode is normal

C1L041 = C1_cnt3[0] & C1L931 # !C1_cnt3[0] & (B1L4 & C1_cnt3[1]);


--C1_hex_r[4] is key_led:inst1|hex_r[4]
--operation mode is normal

C1_hex_r[4]_lut_out = !C1_hex_r[4];
C1_hex_r[4] = DFFEAS(C1_hex_r[4]_lut_out, clock_48M, VCC, , C1_key_edge[2], , , , );


--C1_hex_r[8] is key_led:inst1|hex_r[8]
--operation mode is normal

C1_hex_r[8]_lut_out = !C1_hex_r[8];
C1_hex_r[8] = DFFEAS(C1_hex_r[8]_lut_out, clock_48M, VCC, , C1_key_edge[1], , , , );


--C1_hex_r[12] is key_led:inst1|hex_r[12]
--operation mode is normal

C1_hex_r[12]_lut_out = !C1_hex_r[12];
C1_hex_r[12] = DFFEAS(C1_hex_r[12]_lut_out, clock_48M, VCC, , C1_key_edge[0], , , , );


--C1L141 is key_led:inst1|Mux~1016
--operation mode is normal

C1L141 = C1_cnt3[1] & (C1_cnt3[0]) # !C1_cnt3[1] & (C1_cnt3[0] & C1_hex_r[8] # !C1_cnt3[0] & (C1_hex_r[12]));


--C1_hex_r[0] is key_led:inst1|hex_r[0]
--operation mode is normal

C1_hex_r[0]_lut_out = !C1_hex_r[0];
C1_hex_r[0] = DFFEAS(C1_hex_r[0]_lut_out, clock_48M, VCC, , C1_key_edge[3], , , , );


--C1L241 is key_led:inst1|Mux~1017
--operation mode is normal

C1L241 = C1_cnt3[1] & (C1L141 & (C1_hex_r[0]) # !C1L141 & C1_hex_r[4]) # !C1_cnt3[1] & (C1L141);


--B1L6 is adder8:inst|add~252
--operation mode is arithmetic

B1L6_carry_eqn = B1L5;
B1L6 = C1_hex_r[5] $ C1_hex_r[13] $ !B1L6_carry_eqn;

--B1L7 is adder8:inst|add~254
--operation mode is arithmetic

B1L7 = CARRY(C1_hex_r[5] & (C1_hex_r[13] # !B1L5) # !C1_hex_r[5] & C1_hex_r[13] & !B1L5);


--C1_hex_r[1] is key_led:inst1|hex_r[1]
--operation mode is normal

C1_hex_r[1]_lut_out = !C1_hex_r[1];

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