sled.map.eqn

很多vhdl例程代码

-- Copyright (C) 1991-2005 Altera Corporation
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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--F1_safe_q[0] is counter:inst2|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[0]
--operation mode is arithmetic

F1_safe_q[0]_lut_out = !F1_safe_q[0];
F1_safe_q[0] = DFFEAS(F1_safe_q[0]_lut_out, C1_ClockOut, VCC, , , , , , );

--F1L2 is counter:inst2|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

F1L2 = CARRY(F1_safe_q[0]);


--F1_safe_q[1] is counter:inst2|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[1]
--operation mode is arithmetic

F1_safe_q[1]_carry_eqn = F1L2;
F1_safe_q[1]_lut_out = F1_safe_q[1] $ (F1_safe_q[1]_carry_eqn);
F1_safe_q[1] = DFFEAS(F1_safe_q[1]_lut_out, C1_ClockOut, VCC, , , , , , );

--F1L4 is counter:inst2|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

F1L4 = CARRY(!F1L2 # !F1_safe_q[1]);


--F1_safe_q[2] is counter:inst2|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[2]
--operation mode is arithmetic

F1_safe_q[2]_carry_eqn = F1L4;
F1_safe_q[2]_lut_out = F1_safe_q[2] $ (!F1_safe_q[2]_carry_eqn);
F1_safe_q[2] = DFFEAS(F1_safe_q[2]_lut_out, C1_ClockOut, VCC, , , , , , );

--F1L6 is counter:inst2|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

F1L6 = CARRY(F1_safe_q[2] & (!F1L4));


--F1_safe_q[3] is counter:inst2|lpm_counter:lpm_counter_component|cntr_cs6:auto_generated|safe_q[3]
--operation mode is normal

F1_safe_q[3]_carry_eqn = F1L6;
F1_safe_q[3]_lut_out = F1_safe_q[3] $ (F1_safe_q[3]_carry_eqn);
F1_safe_q[3] = DFFEAS(F1_safe_q[3]_lut_out, C1_ClockOut, VCC, , , , , , );


--B1L7 is decl7s:inst|seg[6]~103
--operation mode is normal

B1L7 = F1_safe_q[0] & (F1_safe_q[3] # F1_safe_q[1] $ F1_safe_q[2]) # !F1_safe_q[0] & (F1_safe_q[1] # F1_safe_q[2] $ F1_safe_q[3]);


--B1L6 is decl7s:inst|seg[5]~104
--operation mode is normal

B1L6 = F1_safe_q[0] & (F1_safe_q[3] $ (F1_safe_q[1] # !F1_safe_q[2])) # !F1_safe_q[0] & F1_safe_q[1] & !F1_safe_q[2] & !F1_safe_q[3];


--B1L5 is decl7s:inst|seg[4]~105
--operation mode is normal

B1L5 = F1_safe_q[1] & F1_safe_q[0] & (!F1_safe_q[3]) # !F1_safe_q[1] & (F1_safe_q[2] & (!F1_safe_q[3]) # !F1_safe_q[2] & F1_safe_q[0]);


--B1L4 is decl7s:inst|seg[3]~106
--operation mode is normal

B1L4 = F1_safe_q[1] & (F1_safe_q[0] & F1_safe_q[2] # !F1_safe_q[0] & !F1_safe_q[2] & F1_safe_q[3]) # !F1_safe_q[1] & !F1_safe_q[3] & (F1_safe_q[0] $ F1_safe_q[2]);


--B1L3 is decl7s:inst|seg[2]~107
--operation mode is normal

B1L3 = F1_safe_q[2] & F1_safe_q[3] & (F1_safe_q[1] # !F1_safe_q[0]) # !F1_safe_q[2] & !F1_safe_q[0] & F1_safe_q[1] & !F1_safe_q[3];


--B1L2 is decl7s:inst|seg[1]~108
--operation mode is normal

B1L2 = F1_safe_q[1] & (F1_safe_q[0] & (F1_safe_q[3]) # !F1_safe_q[0] & F1_safe_q[2]) # !F1_safe_q[1] & F1_safe_q[2] & (F1_safe_q[0] $ F1_safe_q[3]);


--B1L1 is decl7s:inst|seg[0]~109
--operation mode is normal

B1L1 = F1_safe_q[2] & !F1_safe_q[1] & (F1_safe_q[0] $ !F1_safe_q[3]) # !F1_safe_q[2] & F1_safe_q[0] & (F1_safe_q[1] $ !F1_safe_q[3]);


--C1_Temp1 is int_div:inst1|Temp1
--operation mode is normal

C1_Temp1_lut_out = !C1_Temp1;
C1_Temp1 = DFFEAS(C1_Temp1_lut_out, clock, VCC, , C1L08, , , , );


--C1_Temp2 is int_div:inst1|Temp2
--operation mode is normal

C1_Temp2_lut_out = !C1_Temp2;
C1_Temp2 = DFFEAS(C1_Temp2_lut_out, !clock, VCC, , C1L18, , , , );


--C1_ClockOut is int_div:inst1|ClockOut
--operation mode is normal

C1_ClockOut = C1_Temp1 $ C1_Temp2;


--C1_Counter[24] is int_div:inst1|Counter[24]
--operation mode is normal

C1_Counter[24]_lut_out = C1L1;
C1_Counter[24] = DFFEAS(C1_Counter[24]_lut_out, clock, VCC, , , , , , );


--C1_Counter[21] is int_div:inst1|Counter[21]
--operation mode is normal

C1_Counter[21]_lut_out = C1L3;
C1_Counter[21] = DFFEAS(C1_Counter[21]_lut_out, clock, VCC, , , , , , );


--C1_Counter[23] is int_div:inst1|Counter[23]
--operation mode is normal

C1_Counter[23]_lut_out = C1L5 & !C1L08;
C1_Counter[23] = DFFEAS(C1_Counter[23]_lut_out, clock, VCC, , , , , , );


--C1_Counter[20] is int_div:inst1|Counter[20]
--operation mode is normal

C1_Counter[20]_lut_out = C1L7 & !C1L08;
C1_Counter[20] = DFFEAS(C1_Counter[20]_lut_out, clock, VCC, , , , , , );


--C1L28 is int_div:inst1|reduce_nor~318
--operation mode is normal

C1L28 = C1_Counter[24] # C1_Counter[21] # !C1_Counter[20] # !C1_Counter[23];


--C1_Counter[17] is int_div:inst1|Counter[17]
--operation mode is normal

C1_Counter[17]_lut_out = C1L9;
C1_Counter[17] = DFFEAS(C1_Counter[17]_lut_out, clock, VCC, , , , , , );


--C1_Counter[12] is int_div:inst1|Counter[12]
--operation mode is normal

C1_Counter[12]_lut_out = C1L11;
C1_Counter[12] = DFFEAS(C1_Counter[12]_lut_out, clock, VCC, , , , , , );


--C1_Counter[14] is int_div:inst1|Counter[14]
--operation mode is normal

C1_Counter[14]_lut_out = C1L31 & !C1L08;
C1_Counter[14] = DFFEAS(C1_Counter[14]_lut_out, clock, VCC, , , , , , );


--C1_Counter[11] is int_div:inst1|Counter[11]
--operation mode is normal

C1_Counter[11]_lut_out = C1L51 & !C1L08;
C1_Counter[11] = DFFEAS(C1_Counter[11]_lut_out, clock, VCC, , , , , , );


--C1L38 is int_div:inst1|reduce_nor~319
--operation mode is normal

C1L38 = C1_Counter[17] # C1_Counter[12] # !C1_Counter[11] # !C1_Counter[14];


--C1_Counter[10] is int_div:inst1|Counter[10]
--operation mode is normal

C1_Counter[10]_lut_out = C1L71 & !C1L08;
C1_Counter[10] = DFFEAS(C1_Counter[10]_lut_out, clock, VCC, , , , , , );


--C1_Counter[8] is int_div:inst1|Counter[8]
--operation mode is normal

C1_Counter[8]_lut_out = C1L91;
C1_Counter[8] = DFFEAS(C1_Counter[8]_lut_out, clock, VCC, , , , , , );


--C1_Counter[7] is int_div:inst1|Counter[7]
--operation mode is normal

C1_Counter[7]_lut_out = C1L12;
C1_Counter[7] = DFFEAS(C1_Counter[7]_lut_out, clock, VCC, , , , , , );


--C1_Counter[6] is int_div:inst1|Counter[6]
--operation mode is normal

C1_Counter[6]_lut_out = C1L32;
C1_Counter[6] = DFFEAS(C1_Counter[6]_lut_out, clock, VCC, , , , , , );


--C1L48 is int_div:inst1|reduce_nor~320
--operation mode is normal

C1L48 = C1_Counter[10] # !C1_Counter[6] # !C1_Counter[7] # !C1_Counter[8];


--C1_Counter[5] is int_div:inst1|Counter[5]
--operation mode is normal

C1_Counter[5]_lut_out = C1L52;
C1_Counter[5] = DFFEAS(C1_Counter[5]_lut_out, clock, VCC, , , , , , );


--C1_Counter[4] is int_div:inst1|Counter[4]
--operation mode is normal

C1_Counter[4]_lut_out = C1L72;
C1_Counter[4] = DFFEAS(C1_Counter[4]_lut_out, clock, VCC, , , , , , );


--C1_Counter[3] is int_div:inst1|Counter[3]
--operation mode is normal

C1_Counter[3]_lut_out = C1L92;
C1_Counter[3] = DFFEAS(C1_Counter[3]_lut_out, clock, VCC, , , , , , );


--C1_Counter[2] is int_div:inst1|Counter[2]
--operation mode is normal

C1_Counter[2]_lut_out = C1L13;
C1_Counter[2] = DFFEAS(C1_Counter[2]_lut_out, clock, VCC, , , , , , );


--C1L58 is int_div:inst1|reduce_nor~321
--operation mode is normal

C1L58 = !C1_Counter[2] # !C1_Counter[3] # !C1_Counter[4] # !C1_Counter[5];


--C1_Counter[0] is int_div:inst1|Counter[0]
--operation mode is normal

C1_Counter[0]_lut_out = C1L33;
C1_Counter[0] = DFFEAS(C1_Counter[0]_lut_out, clock, VCC, , , , , , );


--C1_Counter[25] is int_div:inst1|Counter[25]
--operation mode is normal

C1_Counter[25]_lut_out = C1L53 & !C1L08;
C1_Counter[25] = DFFEAS(C1_Counter[25]_lut_out, clock, VCC, , , , , , );


--C1L68 is int_div:inst1|reduce_nor~322
--operation mode is normal

C1L68 = !C1_Counter[25] # !C1_Counter[0];


--C1_Counter[1] is int_div:inst1|Counter[1]
--operation mode is normal

C1_Counter[1]_lut_out = C1L63;
C1_Counter[1] = DFFEAS(C1_Counter[1]_lut_out, clock, VCC, , , , , , );


--C1L78 is int_div:inst1|reduce_nor~323
--operation mode is normal

C1L78 = C1L48 # C1L58 # C1L68 # !C1_Counter[1];


--C1_Counter[22] is int_div:inst1|Counter[22]
--operation mode is normal

C1_Counter[22]_lut_out = C1L83 & !C1L08;
C1_Counter[22] = DFFEAS(C1_Counter[22]_lut_out, clock, VCC, , , , , , );


--C1_Counter[19] is int_div:inst1|Counter[19]
--operation mode is normal

C1_Counter[19]_lut_out = C1L04 & !C1L08;
C1_Counter[19] = DFFEAS(C1_Counter[19]_lut_out, clock, VCC, , , , , , );


--C1_Counter[18] is int_div:inst1|Counter[18]
--operation mode is normal

C1_Counter[18]_lut_out = C1L24 & !C1L08;
C1_Counter[18] = DFFEAS(C1_Counter[18]_lut_out, clock, VCC, , , , , , );


--C1_Counter[16] is int_div:inst1|Counter[16]
--operation mode is normal

C1_Counter[16]_lut_out = C1L44;
C1_Counter[16] = DFFEAS(C1_Counter[16]_lut_out, clock, VCC, , , , , , );


--C1L88 is int_div:inst1|reduce_nor~324
--operation mode is normal

C1L88 = C1_Counter[22] & C1_Counter[19] & C1_Counter[18] & !C1_Counter[16];


--C1_Counter[13] is int_div:inst1|Counter[13]
--operation mode is normal

C1_Counter[13]_lut_out = C1L64 & !C1L08;
C1_Counter[13] = DFFEAS(C1_Counter[13]_lut_out, clock, VCC, , , , , , );


--C1_Counter[9] is int_div:inst1|Counter[9]
--operation mode is normal

C1_Counter[9]_lut_out = C1L84;
C1_Counter[9] = DFFEAS(C1_Counter[9]_lut_out, clock, VCC, , , , , , );


--C1_Counter[15] is int_div:inst1|Counter[15]
--operation mode is normal

C1_Counter[15]_lut_out = C1L05;
C1_Counter[15] = DFFEAS(C1_Counter[15]_lut_out, clock, VCC, , , , , , );


--C1L98 is int_div:inst1|reduce_nor~325
--operation mode is normal

C1L98 = C1L88 & C1_Counter[13] & C1_Counter[9] & !C1_Counter[15];


--C1L08 is int_div:inst1|reduce_nor~0
--operation mode is normal

C1L08 = !C1L28 & !C1L38 & !C1L78 & C1L98;


--C1L09 is int_div:inst1|reduce_nor~326
--operation mode is normal

C1L09 = C1_Counter[23] # C1_Counter[20] # !C1_Counter[21] # !C1_Counter[24];


--C1L19 is int_div:inst1|reduce_nor~327
--operation mode is normal

C1L19 = C1_Counter[14] # C1_Counter[11] # !C1_Counter[12] # !C1_Counter[17];


--C1L29 is int_div:inst1|reduce_nor~328
--operation mode is normal

C1L29 = C1_Counter[8] # C1_Counter[7] # C1_Counter[6] # !C1_Counter[10];


--C1L39 is int_div:inst1|reduce_nor~329
--operation mode is normal

C1L39 = C1_Counter[5] # C1_Counter[4] # C1_Counter[3] # C1_Counter[2];


--C1L49 is int_div:inst1|reduce_nor~330
--operation mode is normal

C1L49 = C1_Counter[0] # C1_Counter[25];


--C1L59 is int_div:inst1|reduce_nor~331
--operation mode is normal

C1L59 = C1_Counter[1] # C1L29 # C1L39 # C1L49;


--C1L18 is int_div:inst1|reduce_nor~1
--operation mode is normal

C1L18 = !C1L09 & !C1L19 & !C1L59 & C1L98;


--C1L1 is int_div:inst1|add~391
--operation mode is arithmetic

C1L1_carry_eqn = C1L6;
C1L1 = C1_Counter[24] $ (!C1L1_carry_eqn);