dled.hier_info

来自「很多vhdl例程代码」· HIER_INFO 代码 · 共 179 行

|dled
dig[0] <= scan_led:inst1.dig[0]
dig[1] <= scan_led:inst1.dig[1]
dig[2] <= scan_led:inst1.dig[2]
dig[3] <= scan_led:inst1.dig[3]
dig[4] <= scan_led:inst1.dig[4]
dig[5] <= scan_led:inst1.dig[5]
dig[6] <= scan_led:inst1.dig[6]
dig[7] <= scan_led:inst1.dig[7]
clock_48M => int_div:inst.Clockin
seg[0] <= scan_led:inst1.seg[0]
seg[1] <= scan_led:inst1.seg[1]
seg[2] <= scan_led:inst1.seg[2]
seg[3] <= scan_led:inst1.seg[3]
seg[4] <= scan_led:inst1.seg[4]
seg[5] <= scan_led:inst1.seg[5]
seg[6] <= scan_led:inst1.seg[6]
seg[7] <= scan_led:inst1.seg[7]


|dled|scan_led:inst1
clk_1k => count[1].CLK
clk_1k => count[0].CLK
clk_1k => disp_dat[3].CLK
clk_1k => disp_dat[2].CLK
clk_1k => disp_dat[1].CLK
clk_1k => disp_dat[0].CLK
clk_1k => dig_r[7].CLK
clk_1k => dig_r[6].CLK
clk_1k => dig_r[5].CLK
clk_1k => dig_r[4].CLK
clk_1k => dig_r[3].CLK
clk_1k => dig_r[2].CLK
clk_1k => dig_r[1].CLK
clk_1k => dig_r[0].CLK
clk_1k => count[2].CLK
d[0] => Mux~3.IN7
d[1] => Mux~2.IN7
d[2] => Mux~1.IN7
d[3] => Mux~0.IN7
d[4] => Mux~3.IN6
d[5] => Mux~2.IN6
d[6] => Mux~1.IN6
d[7] => Mux~0.IN6
d[8] => Mux~3.IN5
d[9] => Mux~2.IN5
d[10] => Mux~1.IN5
d[11] => Mux~0.IN5
d[12] => Mux~3.IN4
d[13] => Mux~2.IN4
d[14] => Mux~1.IN4
d[15] => Mux~0.IN4
d[16] => Mux~3.IN3
d[17] => Mux~2.IN3
d[18] => Mux~1.IN3
d[19] => Mux~0.IN3
d[20] => Mux~3.IN2
d[21] => Mux~2.IN2
d[22] => Mux~1.IN2
d[23] => Mux~0.IN2
d[24] => Mux~3.IN1
d[25] => Mux~2.IN1
d[26] => Mux~1.IN1
d[27] => Mux~0.IN1
d[28] => Mux~3.IN0
d[29] => Mux~2.IN0
d[30] => Mux~1.IN0
d[31] => Mux~0.IN0
dig[0] <= dig_r[0].DB_MAX_OUTPUT_PORT_TYPE
dig[1] <= dig_r[1].DB_MAX_OUTPUT_PORT_TYPE
dig[2] <= dig_r[2].DB_MAX_OUTPUT_PORT_TYPE
dig[3] <= dig_r[3].DB_MAX_OUTPUT_PORT_TYPE
dig[4] <= dig_r[4].DB_MAX_OUTPUT_PORT_TYPE
dig[5] <= dig_r[5].DB_MAX_OUTPUT_PORT_TYPE
dig[6] <= dig_r[6].DB_MAX_OUTPUT_PORT_TYPE
dig[7] <= dig_r[7].DB_MAX_OUTPUT_PORT_TYPE
seg[0] <= Mux~18.DB_MAX_OUTPUT_PORT_TYPE
seg[1] <= Mux~17.DB_MAX_OUTPUT_PORT_TYPE
seg[2] <= Mux~16.DB_MAX_OUTPUT_PORT_TYPE
seg[3] <= Mux~15.DB_MAX_OUTPUT_PORT_TYPE
seg[4] <= Mux~14.DB_MAX_OUTPUT_PORT_TYPE
seg[5] <= Mux~13.DB_MAX_OUTPUT_PORT_TYPE
seg[6] <= Mux~12.DB_MAX_OUTPUT_PORT_TYPE
seg[7] <= <VCC>


|dled|int_div:inst
Clockin => Counter[14].CLK
Clockin => Counter[13].CLK
Clockin => Counter[12].CLK
Clockin => Counter[11].CLK
Clockin => Counter[10].CLK
Clockin => Counter[9].CLK
Clockin => Counter[8].CLK
Clockin => Counter[7].CLK
Clockin => Counter[6].CLK
Clockin => Counter[5].CLK
Clockin => Counter[4].CLK
Clockin => Counter[3].CLK
Clockin => Counter[2].CLK
Clockin => Counter[1].CLK
Clockin => Counter[0].CLK
Clockin => Temp1.CLK
Clockin => Counter[15].CLK
Clockin => Temp2.CLK
ClockOut <= ClockOut~0.DB_MAX_OUTPUT_PORT_TYPE


|dled|CONSTANT_3V8:inst4
result[0] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[0]
result[1] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[1]
result[2] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[2]
result[3] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[3]
result[4] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[4]
result[5] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[5]
result[6] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[6]
result[7] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[7]
result[8] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[8]
result[9] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[9]
result[10] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[10]
result[11] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[11]
result[12] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[12]
result[13] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[13]
result[14] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[14]
result[15] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[15]
result[16] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[16]
result[17] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[17]
result[18] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[18]
result[19] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[19]
result[20] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[20]
result[21] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[21]
result[22] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[22]
result[23] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[23]
result[24] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[24]
result[25] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[25]
result[26] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[26]
result[27] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[27]
result[28] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[28]
result[29] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[29]
result[30] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[30]
result[31] <= CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component.result[31]


|dled|CONSTANT_3V8:inst4|CONSTANT_3V8_lpm_constant_3v8:CONSTANT_3V8_lpm_constant_3v8_component
result[0] <= <GND>
result[1] <= <GND>
result[2] <= <GND>
result[3] <= <VCC>
result[4] <= <VCC>
result[5] <= <VCC>
result[6] <= <VCC>
result[7] <= <GND>
result[8] <= <GND>
result[9] <= <VCC>
result[10] <= <VCC>
result[11] <= <GND>
result[12] <= <VCC>
result[13] <= <GND>
result[14] <= <VCC>
result[15] <= <GND>
result[16] <= <GND>
result[17] <= <GND>
result[18] <= <VCC>
result[19] <= <GND>
result[20] <= <VCC>
result[21] <= <VCC>
result[22] <= <GND>
result[23] <= <GND>
result[24] <= <GND>
result[25] <= <VCC>
result[26] <= <GND>
result[27] <= <GND>
result[28] <= <VCC>
result[29] <= <GND>
result[30] <= <GND>
result[31] <= <GND>