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📄 dled.fit.eqn

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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--C1_dig_r[7] is scan_led:inst1|dig_r[7] at LC_X26_Y12_N6
--operation mode is normal

C1_dig_r[7]_lut_out = C1_count[2] # C1_count[1] # C1_disp_dat[0];
C1_dig_r[7] = DFFEAS(C1_dig_r[7]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_dig_r[6] is scan_led:inst1|dig_r[6] at LC_X26_Y12_N9
--operation mode is normal

C1_dig_r[6]_lut_out = C1_count[2] # C1_count[1] # !C1_disp_dat[0];
C1_dig_r[6] = DFFEAS(C1_dig_r[6]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_dig_r[5] is scan_led:inst1|dig_r[5] at LC_X26_Y12_N2
--operation mode is normal

C1_dig_r[5]_lut_out = C1_count[2] # C1_disp_dat[0] # !C1_count[1];
C1_dig_r[5] = DFFEAS(C1_dig_r[5]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_dig_r[4] is scan_led:inst1|dig_r[4] at LC_X26_Y12_N7
--operation mode is normal

C1_dig_r[4]_lut_out = C1_count[2] # !C1_disp_dat[0] # !C1_count[1];
C1_dig_r[4] = DFFEAS(C1_dig_r[4]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_dig_r[3] is scan_led:inst1|dig_r[3] at LC_X26_Y12_N5
--operation mode is normal

C1_dig_r[3]_lut_out = C1_count[1] # C1_disp_dat[0] # !C1_count[2];
C1_dig_r[3] = DFFEAS(C1_dig_r[3]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_dig_r[2] is scan_led:inst1|dig_r[2] at LC_X26_Y12_N1
--operation mode is normal

C1_dig_r[2]_lut_out = C1_count[1] # !C1_disp_dat[0] # !C1_count[2];
C1_dig_r[2] = DFFEAS(C1_dig_r[2]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_dig_r[1] is scan_led:inst1|dig_r[1] at LC_X26_Y12_N0
--operation mode is normal

C1_dig_r[1]_lut_out = C1_disp_dat[0] # !C1_count[1] # !C1_count[2];
C1_dig_r[1] = DFFEAS(C1_dig_r[1]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_disp_dat[3] is scan_led:inst1|disp_dat[3] at LC_X27_Y13_N2
--operation mode is normal

C1_disp_dat[3]_lut_out = C1_count[2] & C1_disp_dat[0] & C1_count[1];
C1_disp_dat[3] = DFFEAS(C1_disp_dat[3]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_disp_dat[0] is scan_led:inst1|disp_dat[0] at LC_X26_Y12_N3
--operation mode is normal

C1_disp_dat[0]_lut_out = !C1_disp_dat[0];
C1_disp_dat[0] = DFFEAS(C1_disp_dat[0]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_disp_dat[1] is scan_led:inst1|disp_dat[1] at LC_X26_Y12_N8
--operation mode is normal

C1_disp_dat[1]_lut_out = C1_count[1] $ (C1_disp_dat[0]);
C1_disp_dat[1] = DFFEAS(C1_disp_dat[1]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1_disp_dat[2] is scan_led:inst1|disp_dat[2] at LC_X26_Y12_N4
--operation mode is normal

C1_disp_dat[2]_lut_out = C1_count[2] $ (C1_count[1] & (C1_disp_dat[0]));
C1_disp_dat[2] = DFFEAS(C1_disp_dat[2]_lut_out, GLOBAL(B1_ClockOut), VCC, , , , , , );


--C1L42 is scan_led:inst1|seg[6]~103 at LC_X27_Y12_N4
--operation mode is normal

C1L42 = C1_disp_dat[0] & (C1_disp_dat[3] # C1_disp_dat[2] $ C1_disp_dat[1]) # !C1_disp_dat[0] & (C1_disp_dat[1] # C1_disp_dat[2] $ C1_disp_dat[3]);


--C1L32 is scan_led:inst1|seg[5]~104 at LC_X27_Y12_N0
--operation mode is normal

C1L32 = C1_disp_dat[0] & (C1_disp_dat[3] $ (C1_disp_dat[1] # !C1_disp_dat[2])) # !C1_disp_dat[0] & !C1_disp_dat[2] & C1_disp_dat[1] & !C1_disp_dat[3];


--C1L22 is scan_led:inst1|seg[4]~105 at LC_X27_Y12_N6
--operation mode is normal

C1L22 = C1_disp_dat[1] & C1_disp_dat[0] & (!C1_disp_dat[3]) # !C1_disp_dat[1] & (C1_disp_dat[2] & (!C1_disp_dat[3]) # !C1_disp_dat[2] & C1_disp_dat[0]);


--C1L12 is scan_led:inst1|seg[3]~106 at LC_X27_Y12_N1
--operation mode is normal

C1L12 = C1_disp_dat[1] & (C1_disp_dat[0] & C1_disp_dat[2] # !C1_disp_dat[0] & !C1_disp_dat[2] & C1_disp_dat[3]) # !C1_disp_dat[1] & !C1_disp_dat[3] & (C1_disp_dat[0] $ C1_disp_dat[2]);


--C1L02 is scan_led:inst1|seg[2]~107 at LC_X27_Y12_N5
--operation mode is normal

C1L02 = C1_disp_dat[2] & C1_disp_dat[3] & (C1_disp_dat[1] # !C1_disp_dat[0]) # !C1_disp_dat[2] & !C1_disp_dat[0] & C1_disp_dat[1] & !C1_disp_dat[3];


--C1L91 is scan_led:inst1|seg[1]~108 at LC_X27_Y12_N2
--operation mode is normal

C1L91 = C1_disp_dat[1] & (C1_disp_dat[0] & (C1_disp_dat[3]) # !C1_disp_dat[0] & C1_disp_dat[2]) # !C1_disp_dat[1] & C1_disp_dat[2] & (C1_disp_dat[0] $ C1_disp_dat[3]);


--C1L81 is scan_led:inst1|seg[0]~109 at LC_X27_Y12_N8
--operation mode is normal

C1L81 = C1_disp_dat[2] & !C1_disp_dat[1] & (C1_disp_dat[0] $ !C1_disp_dat[3]) # !C1_disp_dat[2] & C1_disp_dat[0] & (C1_disp_dat[1] $ !C1_disp_dat[3]);


--C1_count[1] is scan_led:inst1|count[1] at LC_X27_Y12_N9
--operation mode is normal

C1_count[1]_lut_out = !C1_count[1];
C1_count[1] = DFFEAS(C1_count[1]_lut_out, GLOBAL(B1_ClockOut), VCC, , C1_disp_dat[0], , , , );


--C1_count[2] is scan_led:inst1|count[2] at LC_X27_Y12_N3
--operation mode is normal

C1_count[2]_lut_out = !C1_count[2];
C1_count[2] = DFFEAS(C1_count[2]_lut_out, GLOBAL(B1_ClockOut), VCC, , C1L71, , , , );


--B1_Temp1 is int_div:inst|Temp1 at LC_X12_Y12_N9
--operation mode is normal

B1_Temp1_lut_out = !B1_Temp1;
B1_Temp1 = DFFEAS(B1_Temp1_lut_out, GLOBAL(clock_48M), VCC, , B1L66, , , , );


--B1_Temp2 is int_div:inst|Temp2 at LC_X11_Y12_N2
--operation mode is normal

B1_Temp2_lut_out = !B1_Temp2;
B1_Temp2 = DFFEAS(B1_Temp2_lut_out, !GLOBAL(clock_48M), VCC, , B1L07, , , , );


--B1_ClockOut is int_div:inst|ClockOut at LC_X11_Y12_N5
--operation mode is normal

B1_ClockOut = B1_Temp2 $ B1_Temp1;


--C1L71 is scan_led:inst1|Mux~261 at LC_X27_Y12_N7
--operation mode is normal

C1L71 = C1_disp_dat[0] & (C1_count[1]);


--B1_Counter[13] is int_div:inst|Counter[13] at LC_X10_Y11_N9
--operation mode is normal

B1_Counter[13]_lut_out = B1L7 & (!B1L66);
B1_Counter[13] = DFFEAS(B1_Counter[13]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1_Counter[9] is int_div:inst|Counter[9] at LC_X11_Y11_N1
--operation mode is normal

B1_Counter[9]_lut_out = B1L01 & (!B1L66);
B1_Counter[9] = DFFEAS(B1_Counter[9]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1L26 is int_div:inst|reduce_nor~199 at LC_X11_Y11_N9
--operation mode is normal

B1_Counter[14]_qfbk = B1_Counter[14];
B1L26 = B1_Counter[10] # B1_Counter[14]_qfbk # !B1_Counter[9] # !B1_Counter[13];

--B1_Counter[14] is int_div:inst|Counter[14] at LC_X11_Y11_N9
--operation mode is normal

B1_Counter[14] = DFFEAS(B1L26, GLOBAL(clock_48M), VCC, , , B1L1, , , VCC);


--B1_Counter[7] is int_div:inst|Counter[7] at LC_X11_Y11_N0
--operation mode is normal

B1_Counter[7]_lut_out = B1L31 & (!B1L66);
B1_Counter[7] = DFFEAS(B1_Counter[7]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1_Counter[3] is int_div:inst|Counter[3] at LC_X10_Y12_N0
--operation mode is normal

B1_Counter[3]_lut_out = B1L12;
B1_Counter[3] = DFFEAS(B1_Counter[3]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1L36 is int_div:inst|reduce_nor~200 at LC_X11_Y11_N2
--operation mode is normal

B1_Counter[5]_qfbk = B1_Counter[5];
B1L36 = B1_Counter[7] # !B1_Counter[4] # !B1_Counter[5]_qfbk # !B1_Counter[3];

--B1_Counter[5] is int_div:inst|Counter[5] at LC_X11_Y11_N2
--operation mode is normal

B1_Counter[5] = DFFEAS(B1L36, GLOBAL(clock_48M), VCC, , , B1L51, , , VCC);


--B1_Counter[0] is int_div:inst|Counter[0] at LC_X10_Y12_N1
--operation mode is normal

B1_Counter[0]_lut_out = GND;
B1_Counter[0] = DFFEAS(B1_Counter[0]_lut_out, GLOBAL(clock_48M), VCC, , , B1L92, , , VCC);


--B1_Counter[15] is int_div:inst|Counter[15] at LC_X10_Y11_N8
--operation mode is normal

B1_Counter[15]_lut_out = B1L23 & !B1L66;
B1_Counter[15] = DFFEAS(B1_Counter[15]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1L46 is int_div:inst|reduce_nor~201 at LC_X11_Y11_N3
--operation mode is normal

B1_Counter[2]_qfbk = B1_Counter[2];
B1L46 = !B1_Counter[0] # !B1_Counter[2]_qfbk # !B1_Counter[1] # !B1_Counter[15];

--B1_Counter[2] is int_div:inst|Counter[2] at LC_X11_Y11_N3
--operation mode is normal

B1_Counter[2] = DFFEAS(B1L46, GLOBAL(clock_48M), VCC, , , B1L42, , , VCC);


--B1_Counter[12] is int_div:inst|Counter[12] at LC_X11_Y11_N6
--operation mode is normal

B1_Counter[12]_lut_out = !B1L66 & B1L33;
B1_Counter[12] = DFFEAS(B1_Counter[12]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1_Counter[11] is int_div:inst|Counter[11] at LC_X11_Y11_N7
--operation mode is normal

B1_Counter[11]_lut_out = !B1L66 & B1L53;
B1_Counter[11] = DFFEAS(B1_Counter[11]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1_Counter[8] is int_div:inst|Counter[8] at LC_X11_Y11_N8
--operation mode is normal

B1_Counter[8]_lut_out = !B1L66 & B1L83;
B1_Counter[8] = DFFEAS(B1_Counter[8]_lut_out, GLOBAL(clock_48M), VCC, , , , , , );


--B1L56 is int_div:inst|reduce_nor~202 at LC_X11_Y11_N5
--operation mode is normal

B1_Counter[6]_qfbk = B1_Counter[6];
B1L56 = B1_Counter[11] & B1_Counter[8] & B1_Counter[6]_qfbk & B1_Counter[12];

--B1_Counter[6] is int_div:inst|Counter[6] at LC_X11_Y11_N5
--operation mode is normal

B1_Counter[6] = DFFEAS(B1L56, GLOBAL(clock_48M), VCC, , , B1L14, , , VCC);


--B1L66 is int_div:inst|reduce_nor~203 at LC_X11_Y11_N4
--operation mode is normal

B1L66 = !B1L36 & !B1L46 & !B1L26 & B1L56;


--B1L76 is int_div:inst|reduce_nor~204 at LC_X11_Y12_N4
--operation mode is normal

B1_Counter[10]_qfbk = B1_Counter[10];
B1L76 = B1_Counter[13] # B1_Counter[9] # !B1_Counter[14] # !B1_Counter[10]_qfbk;

--B1_Counter[10] is int_div:inst|Counter[10] at LC_X11_Y12_N4
--operation mode is normal

B1_Counter[10] = DFFEAS(B1L76, GLOBAL(clock_48M), VCC, , , B1L4, , , VCC);


--B1L86 is int_div:inst|reduce_nor~205 at LC_X11_Y12_N8
--operation mode is normal

B1_Counter[4]_qfbk = B1_Counter[4];
B1L86 = B1_Counter[3] # B1_Counter[4]_qfbk # B1_Counter[5] # !B1_Counter[7];

--B1_Counter[4] is int_div:inst|Counter[4] at LC_X11_Y12_N8
--operation mode is normal

B1_Counter[4] = DFFEAS(B1L86, GLOBAL(clock_48M), VCC, , , B1L81, , , VCC);


--B1L96 is int_div:inst|reduce_nor~206 at LC_X11_Y12_N6
--operation mode is normal

B1_Counter[1]_qfbk = B1_Counter[1];
B1L96 = B1_Counter[0] # B1_Counter[2] # B1_Counter[1]_qfbk # B1_Counter[15];

--B1_Counter[1] is int_div:inst|Counter[1] at LC_X11_Y12_N6
--operation mode is normal

B1_Counter[1] = DFFEAS(B1L96, GLOBAL(clock_48M), VCC, , , B1L62, , , VCC);


--B1L07 is int_div:inst|reduce_nor~207 at LC_X11_Y12_N9
--operation mode is normal

B1L07 = B1L56 & !B1L76 & !B1L86 & !B1L96;


--B1L1 is int_div:inst|add~241 at LC_X10_Y11_N6
--operation mode is arithmetic

B1L1_carry_eqn = (!B1L43 & B1L8) # (B1L43 & B1L9);
B1L1 = B1_Counter[14] $ !B1L1_carry_eqn;

--B1L2 is int_div:inst|add~243 at LC_X10_Y11_N6
--operation mode is arithmetic

B1L2_cout_0 = B1_Counter[14] & !B1L8;
B1L2 = CARRY(B1L2_cout_0);

--B1L3 is int_div:inst|add~243COUT1_333 at LC_X10_Y11_N6
--operation mode is arithmetic

B1L3_cout_1 = B1_Counter[14] & !B1L9;
B1L3 = CARRY(B1L3_cout_1);


--B1L4 is int_div:inst|add~246 at LC_X10_Y11_N2
--operation mode is arithmetic

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